During the continuous on-time of the high-side MOSFET, the current flows from the self-conducting input bypass capacitor (Cin1) through to the internal inductor and the output bypass capacitor (CO1), returning to the input bypass capacitor during the off-time of the internal high-side MOSFET and the on-time of the low-side MOSFET. Energy stored in the internal inductor flows through the output bypass capacitor and the low-side MOSFET back to GND.
The region where the two loops do not overlap (including the boundary between them) represents the high di/dt current region. The input bypass capacitor (Cin1) plays a critical role in supplying high-frequency current to the converter and returning it to the source path. On the other hand, the output bypass capacitor (Co1) handles less AC current but acts as a high-frequency filter for switching noise.
For these reasons, it’s essential to place the input and output capacitors as close as possible to their respective VIN and VOUT pins on the module. As illustrated in Figure 2, minimizing inductance in these connections involves keeping the traces between the bypass capacitors and their VIN and VOUT pins as short and wide as possible.
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Reducing inductance in PCB board layouts offers two significant benefits. Firstly, it enhances energy transfer between Cin1 and CO1, thereby improving device performance and ensuring effective high-frequency bypassing. This reduces inductive voltage peaks caused by high di/dt currents, minimizing device noise and voltage stress for reliable operation. Secondly, it helps mitigate Electromagnetic Interference (EMI). Using capacitors with low parasitic inductance results in a low impedance profile at high frequencies, reducing conducted radiation. Ceramic capacitors like X7R or X5R, as well as other low ESR types, are recommended for these applications.
Adding more input capacitors can be beneficial if placed in close proximity to GND and VIN terminals. Power modules are designed with inherent low radiated and conducted EMI characteristics. Adhering to PCB layout guidelines discussed here will optimize performance. Often overlooked, path planning for loop currents plays a crucial role in power supply design optimization. Additionally, minimize ground trace lengths to Cin1 and CO1, ensuring they are widened and connected directly to exposed pads, especially critical for Cin1’s ground connection with high AC current.
Ground pins (including exposed pads), input/output capacitors, soft-start capacitors, and feedback resistors should all connect to the PCB’s return layer. This layer serves as a return path for very low inductor currents and can act as a heatsink, as discussed below. Place the feedback resistor as close as possible to the FB pin to minimize noise at this high impedance node. Compensation components or feedforward capacitors should similarly be positioned near upper feedback resistors.
**Thermal Design Recommendations**
While the compact module layout offers electrical benefits, it poses challenges for thermal management, concentrating power dissipation in a smaller space. To address this, a large exposed pad, electrically grounded on the module’s package rear, facilitates low thermal impedance from internal MOSFETs (typically the main heat sources) to the PCB. The θJC thermal impedance from semiconductor junction to package exterior is 1.9°C/W. Achieving industry-standard θJC values is ideal, but this is futile without a low-impedance path (θCA) from package exterior to surrounding air.
The thermal resistance from exposed pad to air is predominantly controlled by PCB design and accompanying heatsinking. For effective thermal management without a heatsink, consider the relatively high θJT (junction-to-top of package) compared to θJA (junction-to-ambient). Calculate power dissipation (PD) using efficiency graphs from datasheets, and determine required thermal resistance based on design constraints like TAmbient and TJunction (125°C).
Estimate PCB area needed for heat dissipation via convection, assuming standard one-ounce copper PCBs with thermal vias on both layers. Include 8-10 thermal vias for effective heat transfer from top to bottom layers. Design a pattern of heat dissipation holes beneath the exposed pad, ideally spaced 1 to 1.5mm apart, to maximize heat dissipation.
Power modules simplify complex power supply designs and typical DC/DC converter PCB layouts. While layout challenges are minimized, optimizing module performance requires thoughtful bypass and thermal PCB board design.
