Misunderstanding 1: There are so many gates left in this FPGA, so you can play to your heart’s content.
Summary: The power consumption of FGPA is directly proportional to the number of flip-flops used and the number of flips. Therefore, the power consumption of the same type of FPGA at different circuits and different times may differ by 100 times. Minimizing the number of flip-flops for high-speed flipping is the fundamental way to reduce FPGA power consumption.
Misunderstanding 2: The PCB design requirements of this board are not high, just use a thinner wire and automatically arrange it.
Summary: Automatic wiring will inevitably take up a larger PCB area, and at the same time produce many times more vias than manual wiring. In a large batch of products, the factors that PCB manufacturers consider for price reduction are line width and overpass, in addition to business factors. The number of holes, which respectively affect the yield of PCB and the number of consumption of drill bits, saves the cost of the supplier, and finds a reason for the price reduction.
Misunderstanding 3: How to deal with these unused I/O ports of CPU and FPGA? Let it be empty.
Summary: If the unused I/O port is left floating, it may become an input signal that oscillates repeatedly due to a little interference from the outside world. The power consumption of a MOS device basically depends on the number of flips of the gate circuit. If it is pulled up, each pin will also have a microampere current, so the best way is to set it as an output (of course, no other signals with driving can be connected to the outside).
Misunderstanding 4: These bus signals are all pulled by resistors.
Summary: There are many reasons why signals need to be pulled up and down, but not all of them need to be pulled. The pull-up and pull-down resistor pulls a simple input signal, and the current is less than tens of microamperes, but when a driven signal is pulled, the current will reach the milliamp level. The current system often has 32 bits of address data each, and there may be 244/245 isolated bus and other signals. If all are pulled up, a few watts of power consumption will be consumed on these resistors.
Misunderstanding 5: Reducing power consumption is all about hardware personnel, and has nothing to do with software.
Summary: The hardware is just a stage, but the software is the performer. The access of almost every chip on the bus and the flip of every signal are almost controlled by the software. If the software can reduce the number of accesses to the external memory (using more register variables, more use of internal CACHE, etc.), timely response to interrupts (interrupts are often low-level active with pull-up resistors) and other specific measures for specific boards will make a great contribution to reducing power consumption.
Summary: The power consumption of FGPA is directly proportional to the number of flip-flops used and the number of flips. Therefore, the power consumption of the same type of FPGA at different circuits and different times may differ by 100 times. Minimizing the number of flip-flops for high-speed flipping is the fundamental way to reduce FPGA power consumption.
Misunderstanding 2: The PCB design requirements of this board are not high, just use a thinner wire and automatically arrange it.
Summary: Automatic wiring will inevitably take up a larger PCB area, and at the same time produce many times more vias than manual wiring. In a large batch of products, the factors that PCB manufacturers consider for price reduction are line width and overpass, in addition to business factors. The number of holes, which respectively affect the yield of PCB and the number of consumption of drill bits, saves the cost of the supplier, and finds a reason for the price reduction.
Misunderstanding 3: How to deal with these unused I/O ports of CPU and FPGA? Let it be empty.
Summary: If the unused I/O port is left floating, it may become an input signal that oscillates repeatedly due to a little interference from the outside world. The power consumption of a MOS device basically depends on the number of flips of the gate circuit. If it is pulled up, each pin will also have a microampere current, so the best way is to set it as an output (of course, no other signals with driving can be connected to the outside).
Misunderstanding 4: These bus signals are all pulled by resistors.
Summary: There are many reasons why signals need to be pulled up and down, but not all of them need to be pulled. The pull-up and pull-down resistor pulls a simple input signal, and the current is less than tens of microamperes, but when a driven signal is pulled, the current will reach the milliamp level. The current system often has 32 bits of address data each, and there may be 244/245 isolated bus and other signals. If all are pulled up, a few watts of power consumption will be consumed on these resistors.
Misunderstanding 5: Reducing power consumption is all about hardware personnel, and has nothing to do with software.
Summary: The hardware is just a stage, but the software is the performer. The access of almost every chip on the bus and the flip of every signal are almost controlled by the software. If the software can reduce the number of accesses to the external memory (using more register variables, more use of internal CACHE, etc.), timely response to interrupts (interrupts are often low-level active with pull-up resistors) and other specific measures for specific boards will make a great contribution to reducing power consumption.
