1. **How to reduce EMI problems by arranging stacks?**
In PCB design, addressing EMI should be considered at the system level first. The PCB alone cannot fully resolve the issue. From an EMI perspective, the primary goal of stack arrangement is to minimize the return path length for signals, reduce the coupling area, and mitigate differential mode interference. Additionally, the ground layer is closely coupled with the power layer, often being more extensive than the power layer itself, which helps in reducing common mode interference.
2. **Why should copper be laid?**
There are several reasons for implementing copper pours:
1. **EMC (Electromagnetic Compatibility)**: Large copper areas for ground or power supply act as shields, and specialized grounds like PGND provide protection.
2. **PCB Process Requirements**: Copper pours are used to ensure effective electroplating and prevent deformation during lamination, especially on layers with limited routing.
3. **Signal Integrity**: Copper provides a solid return path for high-frequency digital signals and minimizes DC network routing. Additional reasons include thermal management and support for special component placements.
3. **What considerations should be made when routing signals in a system with DSP and PLD?**
Consider the ratio of signal speed to trace length. If the signal’s time delay within the transmission line is comparable to the signal edge transition time, signal integrity must be carefully managed. Additionally, in systems with multiple DSPs, clock signals, and data routing, timing and signal quality can be impacted, so these factors need special attention.
4. **Are there other useful tools for routing besides Protel?**
Apart from PROTEL, several other PCB design tools are available, such as Mentor’s WG2000, Cadence’s EN2000 series and PowerPCB, Allegro, Zuken’s Cadstar, and CR5000, each offering distinct advantages for specific design needs.
5. **What is the “signal return path”?**
The signal return path, also referred to as the return current, is the path through which the current flows back to the driver after the high-speed digital signal has been transmitted. When a high-speed signal is sent, it travels from the driver along the PCB transmission line to the load, and then returns to the driver via the shortest path along the ground or power supply. This return current on the ground or power plane is known as the signal return path. As explained by Dr. Johnson in his book, high-frequency signal transmission is essentially a process of charging the dielectric capacitors that are sandwiched between the transmission line and the DC power plane. Signal Integrity (SI) analysis involves studying the electromagnetic properties of the system and the coupling between these elements.
6. **How to perform SI analysis on connectors?**
The IBIS 3.2 specification provides guidance on connector models, with the EBD model typically being used. For special boards like backplanes, a SPICE model is often required. Alternatively, multi-board simulation software (e.g., HYPERLYNX or IS_multiboard) can be used. When designing a multi-board system, the distribution parameters of the connectors should be input, which can generally be found in the connector’s datasheet. While this method may not be highly accurate, it is usually sufficient as long as the results fall within an acceptable range.
7. **What are the termination methods?**
Termination, or impedance matching, is used to ensure signal integrity. It is generally categorized into active termination and passive (terminal) termination based on the location of the matching. Source termination typically involves series resistance, while terminal termination commonly uses parallel resistance. There are various types of termination, including pull-up resistors, pull-down resistors, Thevenin termination, AC termination, and Schottky diode termination.
8. **What factors determine the choice of termination (matching) method?**
The choice of termination method is generally influenced by factors such as the characteristics of the buffer, the circuit topology, the signal levels, and the specific judgment criteria for the system. Additional considerations may include the signal duty cycle, overall system power consumption, and other performance requirements.
9. **What are the guidelines for using termination (matching)?**
The most crucial factor in digital circuits is timing. The goal of termination is to improve signal quality and ensure a stable signal at the decision-making moment. For valid-level signals, the signal quality should remain stable, ensuring proper setup and hold times. For edge signals, the signal transition delay should meet the requirements while preserving the monotonicity of the signal delay. Mentor’s ICX product documentation provides useful information on termination methods. Additionally, the “High-Speed Digital Design: A Handbook of Black Magic” features a dedicated chapter on termination, explaining its impact on signal integrity from an electromagnetic wave perspective, which can serve as a valuable reference.
10. **Can the IBIS model of a device be used to simulate the logic function of the device in PCB layout and design? If not, how should board-level and system-level simulations be performed?**
The IBIS model is a behavioral model and cannot be used for functional simulation. To perform functional simulation, SPICE models or other structural-level models are required.
If you have any PCB manufacturing needs, please do not hesitate to contact me.Contact me
In PCB design, addressing EMI should be considered at the system level first. The PCB alone cannot fully resolve the issue. From an EMI perspective, the primary goal of stack arrangement is to minimize the return path length for signals, reduce the coupling area, and mitigate differential mode interference. Additionally, the ground layer is closely coupled with the power layer, often being more extensive than the power layer itself, which helps in reducing common mode interference.
2. **Why should copper be laid?**
There are several reasons for implementing copper pours:
1. **EMC (Electromagnetic Compatibility)**: Large copper areas for ground or power supply act as shields, and specialized grounds like PGND provide protection.
2. **PCB Process Requirements**: Copper pours are used to ensure effective electroplating and prevent deformation during lamination, especially on layers with limited routing.
3. **Signal Integrity**: Copper provides a solid return path for high-frequency digital signals and minimizes DC network routing. Additional reasons include thermal management and support for special component placements.
3. **What considerations should be made when routing signals in a system with DSP and PLD?**
Consider the ratio of signal speed to trace length. If the signal’s time delay within the transmission line is comparable to the signal edge transition time, signal integrity must be carefully managed. Additionally, in systems with multiple DSPs, clock signals, and data routing, timing and signal quality can be impacted, so these factors need special attention.
4. **Are there other useful tools for routing besides Protel?**
Apart from PROTEL, several other PCB design tools are available, such as Mentor’s WG2000, Cadence’s EN2000 series and PowerPCB, Allegro, Zuken’s Cadstar, and CR5000, each offering distinct advantages for specific design needs.
5. **What is the “signal return path”?**
The signal return path, also referred to as the return current, is the path through which the current flows back to the driver after the high-speed digital signal has been transmitted. When a high-speed signal is sent, it travels from the driver along the PCB transmission line to the load, and then returns to the driver via the shortest path along the ground or power supply. This return current on the ground or power plane is known as the signal return path. As explained by Dr. Johnson in his book, high-frequency signal transmission is essentially a process of charging the dielectric capacitors that are sandwiched between the transmission line and the DC power plane. Signal Integrity (SI) analysis involves studying the electromagnetic properties of the system and the coupling between these elements.
6. **How to perform SI analysis on connectors?**
The IBIS 3.2 specification provides guidance on connector models, with the EBD model typically being used. For special boards like backplanes, a SPICE model is often required. Alternatively, multi-board simulation software (e.g., HYPERLYNX or IS_multiboard) can be used. When designing a multi-board system, the distribution parameters of the connectors should be input, which can generally be found in the connector’s datasheet. While this method may not be highly accurate, it is usually sufficient as long as the results fall within an acceptable range.
7. **What are the termination methods?**
Termination, or impedance matching, is used to ensure signal integrity. It is generally categorized into active termination and passive (terminal) termination based on the location of the matching. Source termination typically involves series resistance, while terminal termination commonly uses parallel resistance. There are various types of termination, including pull-up resistors, pull-down resistors, Thevenin termination, AC termination, and Schottky diode termination.
8. **What factors determine the choice of termination (matching) method?**
The choice of termination method is generally influenced by factors such as the characteristics of the buffer, the circuit topology, the signal levels, and the specific judgment criteria for the system. Additional considerations may include the signal duty cycle, overall system power consumption, and other performance requirements.
9. **What are the guidelines for using termination (matching)?**
The most crucial factor in digital circuits is timing. The goal of termination is to improve signal quality and ensure a stable signal at the decision-making moment. For valid-level signals, the signal quality should remain stable, ensuring proper setup and hold times. For edge signals, the signal transition delay should meet the requirements while preserving the monotonicity of the signal delay. Mentor’s ICX product documentation provides useful information on termination methods. Additionally, the “High-Speed Digital Design: A Handbook of Black Magic” features a dedicated chapter on termination, explaining its impact on signal integrity from an electromagnetic wave perspective, which can serve as a valuable reference.
10. **Can the IBIS model of a device be used to simulate the logic function of the device in PCB layout and design? If not, how should board-level and system-level simulations be performed?**
The IBIS model is a behavioral model and cannot be used for functional simulation. To perform functional simulation, SPICE models or other structural-level models are required.
If you have any PCB manufacturing needs, please do not hesitate to contact me.Contact me
