What problems should be paid attention to in the design of PCB board stack-up? Let the engineers tell you the following. When doing stack-up design, be sure to follow two rules:
1) Ensure that each trace layer has an adjacent reference layer (power or ground);
2) Keep the adjacent main power supply layer and ground layer apart to provide larger coupling capacitance.
Let’s use an example of two, four, and six-layer boards to illustrate:
1. Lamination of single-sided PCB board and double-sided PCB board
For two-layer boards, controlling EMI emissions is primarily a matter of routing and layout. The issue of electromagnetic compatibility for single-layer and double-layer boards is becoming more prominent. This is mainly due to the large signal loop area, resulting in strong electromagnetic radiation and increased sensitivity to external interference. To improve the electromagnetic compatibility of the line, a simple method is to reduce the loop area of key signals. Key signals mainly refer to signals that generate strong radiation and are sensitive to external interference. Single- and double-layer boards are commonly used in low-frequency analog designs below 10KHz:
1) Radially route the power supply on the same layer and parallelize the lines;
2) When running power and ground wires, keep them close to each other and lay a ground wire alongside the key signal wire as close as possible. This reduces the loop area and decreases sensitivity to external interference.
3) For a double-layer circuit board, a ground wire can be laid along the signal line on the other side of the board, close to the bottom of the signal line, and the line should be as wide as possible.
2. Lamination of four-layer boards
1) SIG-GND (PWR)-PWR (GND)-SIG;
2) GND-SIG(PWR)-SIG(PWR)-GND;
For the above two stack-up designs, the potential problem is with the traditional 1.6mm (62mil) board thickness. The large layer spacing is not conducive to controlling impedance, interlayer coupling, and shielding. Particularly, the large spacing between the power ground layers reduces board capacitance and is not conducive to filtering noise. This scheme is usually used when there are more chips on the board, providing better SI performance but poorer EMI performance. The second solution is used when the chip density on the board is low, and there is sufficient area around the chip. In this scheme, the outer layer of the PCB board is the ground layer, and the two middle layers are the signal/power layer. From an EMI control perspective, this is an existing 4-layer PCB structure. Main attention: The distance between the two middle layers of signal and power mixed layers should be widened, and the wiring direction should be vertical to avoid crosstalk. The area of the board should be properly controlled to reflect the 20H rule.
3. Lamination of six-layer boards
For designs with high chip density and high clock frequency, the 6-layer board should be considered. The recommended stacking method is:
1) SIG-GND-SIG-PWR-GND-SIG; this stacking scheme can obtain better signal integrity, with the signal layer adjacent to the ground layer and the power layer paired with the ground layer, ensuring controlled impedance and effective absorption of magnetic field lines.
2) GND-SIG-GND-PWR-SIG-GND; this solution is suitable for cases where the device density is not very high, with all the advantages of the first stack, and the ground planes of the top and bottom layers are relatively complete, serving as a better shielding layer. Therefore, the EMI performance is better than the previous scheme. Comparing the two schemes, the cost of the second scheme is significantly higher. On the PCB board.
1) Ensure that each trace layer has an adjacent reference layer (power or ground);
2) Keep the adjacent main power supply layer and ground layer apart to provide larger coupling capacitance.
Let’s use an example of two, four, and six-layer boards to illustrate:
1. Lamination of single-sided PCB board and double-sided PCB board
For two-layer boards, controlling EMI emissions is primarily a matter of routing and layout. The issue of electromagnetic compatibility for single-layer and double-layer boards is becoming more prominent. This is mainly due to the large signal loop area, resulting in strong electromagnetic radiation and increased sensitivity to external interference. To improve the electromagnetic compatibility of the line, a simple method is to reduce the loop area of key signals. Key signals mainly refer to signals that generate strong radiation and are sensitive to external interference. Single- and double-layer boards are commonly used in low-frequency analog designs below 10KHz:
1) Radially route the power supply on the same layer and parallelize the lines;
2) When running power and ground wires, keep them close to each other and lay a ground wire alongside the key signal wire as close as possible. This reduces the loop area and decreases sensitivity to external interference.
3) For a double-layer circuit board, a ground wire can be laid along the signal line on the other side of the board, close to the bottom of the signal line, and the line should be as wide as possible.
2. Lamination of four-layer boards
1) SIG-GND (PWR)-PWR (GND)-SIG;
2) GND-SIG(PWR)-SIG(PWR)-GND;
For the above two stack-up designs, the potential problem is with the traditional 1.6mm (62mil) board thickness. The large layer spacing is not conducive to controlling impedance, interlayer coupling, and shielding. Particularly, the large spacing between the power ground layers reduces board capacitance and is not conducive to filtering noise. This scheme is usually used when there are more chips on the board, providing better SI performance but poorer EMI performance. The second solution is used when the chip density on the board is low, and there is sufficient area around the chip. In this scheme, the outer layer of the PCB board is the ground layer, and the two middle layers are the signal/power layer. From an EMI control perspective, this is an existing 4-layer PCB structure. Main attention: The distance between the two middle layers of signal and power mixed layers should be widened, and the wiring direction should be vertical to avoid crosstalk. The area of the board should be properly controlled to reflect the 20H rule.
3. Lamination of six-layer boards
For designs with high chip density and high clock frequency, the 6-layer board should be considered. The recommended stacking method is:
1) SIG-GND-SIG-PWR-GND-SIG; this stacking scheme can obtain better signal integrity, with the signal layer adjacent to the ground layer and the power layer paired with the ground layer, ensuring controlled impedance and effective absorption of magnetic field lines.
2) GND-SIG-GND-PWR-SIG-GND; this solution is suitable for cases where the device density is not very high, with all the advantages of the first stack, and the ground planes of the top and bottom layers are relatively complete, serving as a better shielding layer. Therefore, the EMI performance is better than the previous scheme. Comparing the two schemes, the cost of the second scheme is significantly higher. On the PCB board.
