Many designers are accustomed to thinking about system behavior in terms of PCB board models. These models and circuit diagrams are correct to some extent, but they are missing some important information that determines the behavior of the system. The missing information in the circuit diagram is the geometry of the actual PCB board layout, which determines how the elements in the system are coupled electrically and magnetically to each other. So, what causes electromagnetic field coupling between circuit elements, conductors, ferrites, and other complex structures in a real PCB board or IC? This is determined by the interaction between electromagnetic fields and matter, but a conceptual way to summarize signal behavior in complex systems is to consider coupling in terms of parasitic circuit elements, or parasitics for short. Introducing parasitics into circuit models can help you explain unexpected or undesired signal and power supply behavior in real systems, making parasitic modeling tools very helpful for understanding circuit and product behavior.
This is because a circuit diagram simply cannot illustrate some important functions of an actual PCB board, IC, or any other electrical system. Parasitics are represented in circuit diagrams as resistors, capacitors, and inductors, depending on how they behave in the frequency domain. Note that parasitics are discussed almost entirely in terms of LTI circuits, which means that parasitics are also treated as linear and time-varying. Time-varying and nonlinear parasites employ more sophisticated modeling techniques that involve manual iteration in the time domain. They can also be very sensitive to the initial conditions of the system, especially in the presence of feedback. Although the actual PCB board is complex, LTI systems cover the vast majority of practical electrical systems. Determining parasitic effects is essentially determining the frequency behavior of the system since the effect of parasitic elements on the signal is a function of frequency. By comparing the frequency behavior of the [ideal system + possible parasites] with the [actual system measurements], it is possible to identify possible parasites producing frequency-dependent behavior in the system.
What determines parasitics and what is not considered in the circuit diagram?
Many aspects of a real system can create unexpected parasitics in a PCB board layout, IC, or any other electrical system. It is important to note what cannot be considered in the circuit diagram before attempting to extract parasitics using SPICE simulation. The distance between the various conductors, their arrangement on the board, and their cross-sectional area will determine the DC resistance, parasitic capacitance, and parasitic inductance. Dielectric Constant: The dielectric constant of the PCB board dielectric is high, which determines the parasitic capacitance between circuit elements. Permeability: For magnetic components, permeability also plays a role in determining signal and power behavior, as these components create parasitic inductance. When operating at high frequencies, ferrite transformers and other magnetic components can act like inductors or radiators, exhibiting traveling wave behavior. Any signal propagating in the actual PCB board and interconnects is a propagating waveform. The propagation of electromagnetic waves creates transmission line effects in interconnects that cannot be modeled with a simple circuit diagram. Your SPICE simulation will need to be modified to account for the finite speed of the waveform. Things like fiber weaving effects, especially phenomena within a PCB board substrate, are difficult to simulate easily with circuit modeling or post-layout simulation, as the circuit models involved can become tricky. However, circuit simulation can help you extensively examine frequency-dependent behavior in a PCB board. Other parasites, such as input/output capacitance or bond wire inductance on integrated circuits, can be easily determined because the type of parasite and its location can be known with certainty.
The example schematic below shows a typical circuit model for examining and explaining ground bounce in an integrated circuit. This effect occurs due to parasitic inductance in the ground wire (labeled L in the schematic). However, there are other factors in the circuit that affect the behavior of the circuit in the presence of ground bounce. Two capacitors at the driver output and the load input simulate parasitic capacitance due to pins on the IC. Resistors on the I/O lines simulate their parasitic DC resistance. The goal of parasitic extraction is usually to estimate the frequency-dependent behavior of a system to broadly describe the system as capacitive or inductive over certain frequency ranges. Using the type of schematic shown above, you can extract parasitic effects by comparing simulation results with experimental measurements. Simply use frequency sweeps to simulate circuits, or pulses to provide transient analysis of circuits. Then, you need to compare the results with the measurement data to identify parasitics in the system.
There are two ways to extract parasites in SPICE. Both of these require an understanding of the parasites that may be present in the system or need to be compared to measurements of the finished PCB board layout:
1) Analytical methods, involve the use of analytical equations to calculate the frequency-dependent behavior of trivial or non-trivial circuit models. Component values are usually derived from data sheets or prior experience.
2) The regression method, which is used when the equivalent values of the parasitic circuit elements are not known, although a general model describing the relationship between the parasitic circuit and the measured value is known. Standard regression methods can be used to determine the agreement between the model and the data.
In the upcoming examples, we will consider how to run the PSpice simulation required for both methods. Instead of assuming a single value for various parasites, we will assume various possible values and examine the frequency response using SPICE simulation. The results can be used to build a model that describes how the frequency response of the circuit depends on certain spurious values, which can then be used to calculate spurious values from measurement data.
As an example, let’s look at how to extract the parasitic capacitance in a capacitor by identifying its self-resonant frequency. Self-resonance is a well-known phenomenon in high-frequency capacitors due to parasitic series resistance and inductance. In the schematic below, we have a capacitor rated at 4.7pF, and we want to extract the parasitic inductance and resistance. Here, we are sweeping the frequency of the source and also sweeping the spurious values. This is done by sweeping the parameters in the frequency domain, which will give us a set of curves for our current measurements. They can then be used to extract the self-resonant frequency and ESL value. To do this, you need to set a global parameter for each component value you want to scan. This is done by adding the PARAM part to the schematic and then entering the parameter name in the component value. Data extracted from SPICE simulations can be used in analytical methods or regression methods. In the analytical approach, the parasitic values can be calculated directly from the simulated response as long as there is a model of the frequency response as a function of the parasitic value (in this case the capacitor self-resonant frequency). In the example above, we want to compare the measured impedance or self-resonance with the simulated value to determine the exact value for the parasite. If the simulated and measured curves are very similar, the model can describe the behavior of the circuit with high accuracy. In practice you won’t have such a perfect match, so you have to fit the simulated data (self-resonant frequency in this case) to a model (usually linear or power law). You can then plug the observations from the measurement data into the model to calculate values for the associated parasite. Similar techniques can be used for other tests and environments.
When to return to the layout
At some point, the actual PCB board layout becomes so complex that trying to extract parasitics by fitting an equivalent circuit model becomes tricky. Technically, you could write a program to repeatedly fit the data and some predefined experimental model, but your program would still have to guess exactly what the parasite was and its equivalent circuit arrangement (parallel, series, or non-trivial) produces signaling behavior. At this point, the alternative is to go back to the field solver to extract parasitics from the PCB board layout. Extracting parasites in the layout back view is very simple. Simply select the interconnects to analyze and run the automatic extraction tool. The integrated field solver will calculate the equivalent parasitics in the PCB board layout directly from Maxwell’s equations.
This is because a circuit diagram simply cannot illustrate some important functions of an actual PCB board, IC, or any other electrical system. Parasitics are represented in circuit diagrams as resistors, capacitors, and inductors, depending on how they behave in the frequency domain. Note that parasitics are discussed almost entirely in terms of LTI circuits, which means that parasitics are also treated as linear and time-varying. Time-varying and nonlinear parasites employ more sophisticated modeling techniques that involve manual iteration in the time domain. They can also be very sensitive to the initial conditions of the system, especially in the presence of feedback. Although the actual PCB board is complex, LTI systems cover the vast majority of practical electrical systems. Determining parasitic effects is essentially determining the frequency behavior of the system since the effect of parasitic elements on the signal is a function of frequency. By comparing the frequency behavior of the [ideal system + possible parasites] with the [actual system measurements], it is possible to identify possible parasites producing frequency-dependent behavior in the system.
What determines parasitics and what is not considered in the circuit diagram?
Many aspects of a real system can create unexpected parasitics in a PCB board layout, IC, or any other electrical system. It is important to note what cannot be considered in the circuit diagram before attempting to extract parasitics using SPICE simulation. The distance between the various conductors, their arrangement on the board, and their cross-sectional area will determine the DC resistance, parasitic capacitance, and parasitic inductance. Dielectric Constant: The dielectric constant of the PCB board dielectric is high, which determines the parasitic capacitance between circuit elements. Permeability: For magnetic components, permeability also plays a role in determining signal and power behavior, as these components create parasitic inductance. When operating at high frequencies, ferrite transformers and other magnetic components can act like inductors or radiators, exhibiting traveling wave behavior. Any signal propagating in the actual PCB board and interconnects is a propagating waveform. The propagation of electromagnetic waves creates transmission line effects in interconnects that cannot be modeled with a simple circuit diagram. Your SPICE simulation will need to be modified to account for the finite speed of the waveform. Things like fiber weaving effects, especially phenomena within a PCB board substrate, are difficult to simulate easily with circuit modeling or post-layout simulation, as the circuit models involved can become tricky. However, circuit simulation can help you extensively examine frequency-dependent behavior in a PCB board. Other parasites, such as input/output capacitance or bond wire inductance on integrated circuits, can be easily determined because the type of parasite and its location can be known with certainty.
The example schematic below shows a typical circuit model for examining and explaining ground bounce in an integrated circuit. This effect occurs due to parasitic inductance in the ground wire (labeled L in the schematic). However, there are other factors in the circuit that affect the behavior of the circuit in the presence of ground bounce. Two capacitors at the driver output and the load input simulate parasitic capacitance due to pins on the IC. Resistors on the I/O lines simulate their parasitic DC resistance. The goal of parasitic extraction is usually to estimate the frequency-dependent behavior of a system to broadly describe the system as capacitive or inductive over certain frequency ranges. Using the type of schematic shown above, you can extract parasitic effects by comparing simulation results with experimental measurements. Simply use frequency sweeps to simulate circuits, or pulses to provide transient analysis of circuits. Then, you need to compare the results with the measurement data to identify parasitics in the system.
There are two ways to extract parasites in SPICE. Both of these require an understanding of the parasites that may be present in the system or need to be compared to measurements of the finished PCB board layout:
1) Analytical methods, involve the use of analytical equations to calculate the frequency-dependent behavior of trivial or non-trivial circuit models. Component values are usually derived from data sheets or prior experience.
2) The regression method, which is used when the equivalent values of the parasitic circuit elements are not known, although a general model describing the relationship between the parasitic circuit and the measured value is known. Standard regression methods can be used to determine the agreement between the model and the data.
In the upcoming examples, we will consider how to run the PSpice simulation required for both methods. Instead of assuming a single value for various parasites, we will assume various possible values and examine the frequency response using SPICE simulation. The results can be used to build a model that describes how the frequency response of the circuit depends on certain spurious values, which can then be used to calculate spurious values from measurement data.
As an example, let’s look at how to extract the parasitic capacitance in a capacitor by identifying its self-resonant frequency. Self-resonance is a well-known phenomenon in high-frequency capacitors due to parasitic series resistance and inductance. In the schematic below, we have a capacitor rated at 4.7pF, and we want to extract the parasitic inductance and resistance. Here, we are sweeping the frequency of the source and also sweeping the spurious values. This is done by sweeping the parameters in the frequency domain, which will give us a set of curves for our current measurements. They can then be used to extract the self-resonant frequency and ESL value. To do this, you need to set a global parameter for each component value you want to scan. This is done by adding the PARAM part to the schematic and then entering the parameter name in the component value. Data extracted from SPICE simulations can be used in analytical methods or regression methods. In the analytical approach, the parasitic values can be calculated directly from the simulated response as long as there is a model of the frequency response as a function of the parasitic value (in this case the capacitor self-resonant frequency). In the example above, we want to compare the measured impedance or self-resonance with the simulated value to determine the exact value for the parasite. If the simulated and measured curves are very similar, the model can describe the behavior of the circuit with high accuracy. In practice you won’t have such a perfect match, so you have to fit the simulated data (self-resonant frequency in this case) to a model (usually linear or power law). You can then plug the observations from the measurement data into the model to calculate values for the associated parasite. Similar techniques can be used for other tests and environments.
When to return to the layout
At some point, the actual PCB board layout becomes so complex that trying to extract parasitics by fitting an equivalent circuit model becomes tricky. Technically, you could write a program to repeatedly fit the data and some predefined experimental model, but your program would still have to guess exactly what the parasite was and its equivalent circuit arrangement (parallel, series, or non-trivial) produces signaling behavior. At this point, the alternative is to go back to the field solver to extract parasitics from the PCB board layout. Extracting parasites in the layout back view is very simple. Simply select the interconnects to analyze and run the automatic extraction tool. The integrated field solver will calculate the equivalent parasitics in the PCB board layout directly from Maxwell’s equations.
