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The general principles of multi-layer PCB soft and hard board layout and routing that PCB designers must follow are outlined below:

(1) **The Principle of Setting the Spacing of Printed Traces for Components:** The spacing between different networks is determined by several factors, including electrical insulation, the manufacturing process, and the size of the components. For example, if the pin pitch of a chip component is 8 mils, the [ClearanceConstraint] for that chip should not be set to 10 mils. Instead, PCB designers should set a specific 6 mil design rule for the chip. Additionally, the spacing should take into account the capabilities of the manufacturer.

An important consideration for components is electrical insulation. If there is a significant potential difference between two components or networks, sufficient electrical insulation must be ensured. The safety voltage gap in a typical environment is 200V/mm, or 5.08V/mil. Therefore, when both high-voltage and low-voltage circuits are present on the same PCB, it is critical to maintain adequate safety clearance to prevent electrical interference or shorts. Proper safety distances must be observed, particularly when high-voltage and low-voltage circuits coexist on the same board.

(2) **Selection of Wiring Form at Line Corners**: To ensure both manufacturability and aesthetic appeal of the PCB, it is essential to define the cornering style and select appropriate routing for circuit corners during PCB design. Common options include 45°, 90°, and curved (arc) corners. Sharp corners should generally be avoided. The best practice is to use arc transitions or 45° turns, and to steer clear of 90° or more acute angles, as these can lead to signal integrity issues.

The transition between the trace and pad should also be as smooth as possible to prevent sharp, small edges that can cause reliability problems. This issue can be addressed through techniques like teardropping. When the center-to-center distance between two pads is less than the outer diameter (D) of a pad, the trace width can match the pad diameter. However, when the center-to-center distance exceeds the pad diameter, the trace width should be kept smaller than the pad diameter. If a trace passes between two pads without connecting to them, it should maintain the maximum, equal spacing from both pads. Similarly, when two traces pass between pads without making contact, the spacing between them should also be maximized and kept uniform.

(3) **Determining Trace Width**: Trace width is influenced by several factors, such as the current flowing through the trace and the need for electromagnetic interference (EMI) control. The higher the current, the wider the trace should be. Power traces should generally be wider than signal traces. To ensure stable ground potential, the trace width should be increased if the ground current is expected to vary significantly. In general, power traces should be wider than signal traces, and ground traces should also be sufficiently wide. Experiments show that when the copper thickness of the printed traces is 0.05mm, a trace can carry 1A of current per mm of width. For example, a 1mm wide, 0.05mm thick trace can handle 1A. For typical designs, this width is usually sufficient. However, for high-voltage and high-current applications, signal trace widths of 10–30 mils (0.25–0.75mm) may be required to safely carry the current. When the line width exceeds or equals 40 mils (1mm), the spacing between adjacent traces should be at least 30 mils (0.75mm). To improve trace reliability and reduce impedance, it is advisable to use the widest trace possible within the limitations of the available PCB area and design density.

For power and ground traces, ensuring waveform stability is critical. If the PCB space allows, the power and ground traces should be made as wide as possible. Typically, power traces should be at least 50 mils (1.27mm) wide.

(4) **Electromagnetic Interference (EMI) Protection and Shielding**: The primary sources of interference in PCB wiring include crosstalk between signal traces and power line interference. Effective routing and grounding strategies are crucial for minimizing interference and enhancing the PCB’s electromagnetic compatibility (EMC). Proper layout of the traces and grounding techniques can significantly reduce the impact of EMI and improve the PCB’s overall performance.

For high-frequency or sensitive signal traces, such as clock signals, the trace width should be maximized as much as possible. Additionally, it may be beneficial to employ a ground layer that surrounds the signal trace, effectively isolating it from neighboring traces. This can be achieved by wrapping the signal trace with a continuous ground path or adding a dedicated shield layer around the trace. This method, known as “grounded shielding,” provides an effective barrier to reduce interference from adjacent signal traces.
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