1. Before designing a multilayer printed circuit board (PCB), the designer must first define the electromagnetic compatibility (EMC) requirements. This involves considering factors such as the size of the PCB and the specific design constraints.
2. Based on these requirements, the designer can then decide on the appropriate PCB structure, which involves choosing whether to use a 4-layer, 6-layer, or a higher-layer count PCB.
3. Once the number of layers has been determined, the next step is to decide where to position the internal electrical layers and how to allocate different signals across these layers. This process defines the stack-up structure of the multilayer PCB.
4. The stack-up configuration plays a crucial role in the overall EMC performance of the PCB, as it is a key factor in mitigating electromagnetic interference (EMI). This section will explore the considerations related to the multilayer PCB stack-up structure.
1. **Layer Selection and Superposition Principle**
When determining the stack-up structure of a multilayer PCB, various factors need to be considered. From a wiring perspective, more layers can provide better routing options; however, increasing the number of layers also introduces complexity. For manufacturers, whether the laminate structure is symmetrical or asymmetrical is a key consideration during PCB production. The symmetry of the stack-up directly influences the board’s cost and manufacturing difficulty. Thus, selecting the number of layers requires a careful balance of these factors. For experienced designers, after completing the initial component placement, the next critical step is analyzing the routing bottlenecks on the PCB. At this stage, the tool evaluates the wiring density of the board. Then, the designer focuses on integrating special signal types with specific routing requirements, such as differential pairs and sensitive signal traces. Various EDA tools are used to assess the number and type of signals that require special routing. Based on this, the number of signal layers is determined. Additionally, power supply types, isolation requirements, and resistance to interference are considered when determining the number of inner power layers. Once these factors are considered, the number of layers for the entire PCB is largely defined. After determining the layer count, the next task is to carefully plan the placement of circuits across each layer.
– (1) Signal layers should be adjacent to an internal power or ground layer, using the large copper planes of the inner layers for shielding.
– (2) The internal power and ground layers should be tightly coupled, meaning the dielectric thickness between them should be minimal to maximize capacitance and increase the resonant frequency.
– (3) High-speed signal layers should be placed as intermediate layers, sandwiched between two internal power or ground layers. This arrangement allows the copper planes to provide electromagnetic shielding for high-speed signals and reduces external interference.
– (4) Avoid placing two signal layers directly next to each other. Crosstalk can easily occur between adjacent signal layers, leading to circuit failures. Adding a ground plane between signal layers helps to mitigate this.
– (5) Multiple grounded internal layers can significantly reduce ground impedance. For instance, separating ground planes between signal layers A and B can reduce common-mode interference.
– (6) Consider symmetry in the layer structure to ensure balance and performance.
2. **Commonly Used Stack-Up Structures**
Below is an example of a 4-layer PCB to illustrate how to optimize layer arrangement:
For a standard 4-layer PCB, the following stack-up configurations are commonly used (from top to bottom):
– (1) Signal_1 (Top), GND (Inner_1), POWER (Inner_2), Signal_2 (Bottom).
– (2) Signal_1 (Top), POWER (Inner_1), GND (Inner_2), Signal_2 (Bottom).
– (3) POWER (Top), Signal_1 (Inner_1), GND (Inner_2), Signal_2 (Bottom).
Option 3 is not ideal, as it lacks effective coupling between the power and ground planes and should be avoided. So how should one choose between options 1 and 2? In general, designers tend to prefer option 1 for the 4-layer board structure. This is not because option 2 is unsuitable, but because most PCB designs only place components on the top layer, making option 1 a better fit. However, if components are placed on both the top and bottom layers, and the dielectric thickness between the power and ground layers is large with poor coupling, designers need to evaluate which layer has fewer signal traces. For option 1, the bottom layer typically has fewer signal lines, allowing for the use of large-area copper to couple with the power layer. Conversely, if more components are placed on the bottom layer, option 2 may be more appropriate.
After analyzing the 4-layer stack-up, we can look at a 6-layer board for further examples of how stack-up structures can be arranged and optimized:
– (1) Signal_1 (Top), GND (Inner_1), Signal_2 (Inner_2), Signal_3 (Inner_3), POWER (Bottom).
Scheme 1 uses 4 signal layers and 2 internal power/ground layers. Although it provides more signal layers, it also has significant drawbacks:
a. The power and ground layers are spaced apart and not fully coupled.
b. Signal layers Signal_2 (Inner_2) and Signal_3 (Inner_3) are adjacent to each other, offering poor signal isolation and increased potential for crosstalk.
– (2) Signal_1 (Top), Signal_2 (Inner_1), POWER (Inner_2), GND (Inner_3), Signal_3 (Bottom).
Compared to Scheme 1, Scheme 2 offers better coupling between the power and ground layers. However, Signal_1 (Top) and Signal_2 (Inner_1), as well as Signal_3 (Inner_4) and Signal_4 (Bottom), are still adjacent, so the signal isolation remains suboptimal and crosstalk persists.
– (3) Signal_1 (Top), Signal_2 (Inner_1), POWER (Inner_2), GND (Inner_3), Signal_3 (Bottom).
Scheme 3 improves upon the previous two by reducing the number of signal layers and adding an internal power/ground layer. Although the total number of wiring layers is reduced, this configuration addresses common issues found in Scheme 1 and Scheme 2:
a. The power and ground layers are tightly coupled.
b. Each signal layer is directly adjacent to an internal power or ground layer, ensuring better isolation from other signal layers and reducing crosstalk.
Through the analysis of these examples, it becomes clear that while no single stack-up structure can satisfy all design requirements, understanding the priorities of various design principles is essential. However, it’s important to note that the layer design must reflect the specific characteristics of the circuit. For example, the anti-interference needs and other design considerations can vary depending on the circuit’s function, so these principles do not always follow a strict priority order. However, principle (2) — ensuring tight coupling between the power and ground layers — is particularly critical when high-speed signals are involved in the design. Additionally, principle (3) — positioning high-speed signal layers as intermediate layers between power and ground planes — must also be prioritized to ensure optimal performance.
If you have any PCB manufacturing needs, please do not hesitate to contact me.Contact me
2. Based on these requirements, the designer can then decide on the appropriate PCB structure, which involves choosing whether to use a 4-layer, 6-layer, or a higher-layer count PCB.
3. Once the number of layers has been determined, the next step is to decide where to position the internal electrical layers and how to allocate different signals across these layers. This process defines the stack-up structure of the multilayer PCB.
4. The stack-up configuration plays a crucial role in the overall EMC performance of the PCB, as it is a key factor in mitigating electromagnetic interference (EMI). This section will explore the considerations related to the multilayer PCB stack-up structure.
1. **Layer Selection and Superposition Principle**
When determining the stack-up structure of a multilayer PCB, various factors need to be considered. From a wiring perspective, more layers can provide better routing options; however, increasing the number of layers also introduces complexity. For manufacturers, whether the laminate structure is symmetrical or asymmetrical is a key consideration during PCB production. The symmetry of the stack-up directly influences the board’s cost and manufacturing difficulty. Thus, selecting the number of layers requires a careful balance of these factors. For experienced designers, after completing the initial component placement, the next critical step is analyzing the routing bottlenecks on the PCB. At this stage, the tool evaluates the wiring density of the board. Then, the designer focuses on integrating special signal types with specific routing requirements, such as differential pairs and sensitive signal traces. Various EDA tools are used to assess the number and type of signals that require special routing. Based on this, the number of signal layers is determined. Additionally, power supply types, isolation requirements, and resistance to interference are considered when determining the number of inner power layers. Once these factors are considered, the number of layers for the entire PCB is largely defined. After determining the layer count, the next task is to carefully plan the placement of circuits across each layer.
– (1) Signal layers should be adjacent to an internal power or ground layer, using the large copper planes of the inner layers for shielding.
– (2) The internal power and ground layers should be tightly coupled, meaning the dielectric thickness between them should be minimal to maximize capacitance and increase the resonant frequency.
– (3) High-speed signal layers should be placed as intermediate layers, sandwiched between two internal power or ground layers. This arrangement allows the copper planes to provide electromagnetic shielding for high-speed signals and reduces external interference.
– (4) Avoid placing two signal layers directly next to each other. Crosstalk can easily occur between adjacent signal layers, leading to circuit failures. Adding a ground plane between signal layers helps to mitigate this.
– (5) Multiple grounded internal layers can significantly reduce ground impedance. For instance, separating ground planes between signal layers A and B can reduce common-mode interference.
– (6) Consider symmetry in the layer structure to ensure balance and performance.
2. **Commonly Used Stack-Up Structures**
Below is an example of a 4-layer PCB to illustrate how to optimize layer arrangement:
For a standard 4-layer PCB, the following stack-up configurations are commonly used (from top to bottom):
– (1) Signal_1 (Top), GND (Inner_1), POWER (Inner_2), Signal_2 (Bottom).
– (2) Signal_1 (Top), POWER (Inner_1), GND (Inner_2), Signal_2 (Bottom).
– (3) POWER (Top), Signal_1 (Inner_1), GND (Inner_2), Signal_2 (Bottom).
Option 3 is not ideal, as it lacks effective coupling between the power and ground planes and should be avoided. So how should one choose between options 1 and 2? In general, designers tend to prefer option 1 for the 4-layer board structure. This is not because option 2 is unsuitable, but because most PCB designs only place components on the top layer, making option 1 a better fit. However, if components are placed on both the top and bottom layers, and the dielectric thickness between the power and ground layers is large with poor coupling, designers need to evaluate which layer has fewer signal traces. For option 1, the bottom layer typically has fewer signal lines, allowing for the use of large-area copper to couple with the power layer. Conversely, if more components are placed on the bottom layer, option 2 may be more appropriate.
After analyzing the 4-layer stack-up, we can look at a 6-layer board for further examples of how stack-up structures can be arranged and optimized:
– (1) Signal_1 (Top), GND (Inner_1), Signal_2 (Inner_2), Signal_3 (Inner_3), POWER (Bottom).
Scheme 1 uses 4 signal layers and 2 internal power/ground layers. Although it provides more signal layers, it also has significant drawbacks:
a. The power and ground layers are spaced apart and not fully coupled.
b. Signal layers Signal_2 (Inner_2) and Signal_3 (Inner_3) are adjacent to each other, offering poor signal isolation and increased potential for crosstalk.
– (2) Signal_1 (Top), Signal_2 (Inner_1), POWER (Inner_2), GND (Inner_3), Signal_3 (Bottom).
Compared to Scheme 1, Scheme 2 offers better coupling between the power and ground layers. However, Signal_1 (Top) and Signal_2 (Inner_1), as well as Signal_3 (Inner_4) and Signal_4 (Bottom), are still adjacent, so the signal isolation remains suboptimal and crosstalk persists.
– (3) Signal_1 (Top), Signal_2 (Inner_1), POWER (Inner_2), GND (Inner_3), Signal_3 (Bottom).
Scheme 3 improves upon the previous two by reducing the number of signal layers and adding an internal power/ground layer. Although the total number of wiring layers is reduced, this configuration addresses common issues found in Scheme 1 and Scheme 2:
a. The power and ground layers are tightly coupled.
b. Each signal layer is directly adjacent to an internal power or ground layer, ensuring better isolation from other signal layers and reducing crosstalk.
Through the analysis of these examples, it becomes clear that while no single stack-up structure can satisfy all design requirements, understanding the priorities of various design principles is essential. However, it’s important to note that the layer design must reflect the specific characteristics of the circuit. For example, the anti-interference needs and other design considerations can vary depending on the circuit’s function, so these principles do not always follow a strict priority order. However, principle (2) — ensuring tight coupling between the power and ground layers — is particularly critical when high-speed signals are involved in the design. Additionally, principle (3) — positioning high-speed signal layers as intermediate layers between power and ground planes — must also be prioritized to ensure optimal performance.
If you have any PCB manufacturing needs, please do not hesitate to contact me.Contact me
