1. For a group of buses (address, data, command) driving multiple devices (e.g., FLASH, SDRAM, and other peripherals), what method is typically used in PCB wiring?
The impact of wiring topology on signal integrity primarily manifests in the variation of signal arrival times across different nodes. Additionally, reflected signals may not reach a specific node simultaneously, further degrading signal quality. Generally, in a star topology, it is possible to control the lengths of the stubs to ensure that signal transmission and reflection delays are consistent, thus improving signal quality.
Before opting for this topology, the signal topology nodes, the actual operating principles, and the difficulty of routing must be carefully considered. Different buffers affect signal reflections differently, so the star topology cannot effectively address the delay issues on the data/address bus connecting to flash and SDRAM, thus failing to guarantee signal integrity. Moreover, high-speed signals typically involve communication between the DSP and SDRAM, whereas the flash loading speed is relatively low. In high-speed simulations, the focus should be on ensuring clean waveforms at the node where high-speed signals are actively used, rather than worrying about the waveform at the flash node. Compared to other topologies, such as daisy chain, the star topology tends to be more complex, especially when a large number of address/data signals are routed in a star configuration.
1. The attached figure shows the simulation waveform of the Hyperlynx signal data in a DDR–DSP–FLASH topology and a DDR–FLASH–DSP topology at 150 MHz.
It can be observed that in the second configuration, the signal quality at the DSP is better, but the waveform at the FLASH is poorer. The actual functional signal is the waveform at the DSP and DDR.
2. During the EMC test, it was found that the clock signal’s harmonics exceeded the standard significantly, despite a decoupling capacitor being connected to the power supply pin. What aspects of PCB design should be considered to reduce electromagnetic radiation?
The three components of EMC are the radiation source, the transmission path, and the victim. The transmission path can be either through space radiation or cable conduction. To reduce harmonics, it’s important to first understand how the signal propagates. Power supply decoupling addresses the conduction mode propagation. In addition, proper impedance matching and shielding are also essential.
3. Is there any regulation regarding the copper area of the conduction band, specifically the ground plane of a microstrip line?
For microwave circuit design, the size of the ground plane does affect the transmission line’s parameters. The specific calculation method is more complex (see the relevant documentation for EESOFT by Angelen). In general, for PCB digital circuit transmission line simulations, the ground plane’s area has little to no effect on the transmission line parameters, or its impact can be neglected.
4. In PCB design, the ground is typically divided into protective ground and signal ground; power ground is further split into digital ground and analog ground. Why is the ground divided this way?
The primary reason for dividing the ground is to address EMC concerns. This division helps prevent noise from the digital section of the power supply and ground from interfering with other signals, especially analog signals, through conduction paths. As for the division between signal and protective ground, this is related to the role of ESD protection, similar to how lightning rods protect structures. Regardless of the divisions, there ultimately remains a single ground; the difference lies in the method of noise suppression.
5. For PCBs with frequencies above 30 MHz, should automatic routing or manual routing be used? Are the software routing functions the same?
The key factor for high-speed signals is the signal’s rising edge, rather than the absolute frequency or speed. Whether automatic or manual routing is used depends on the capabilities of the routing software. In some cases, manual routing can be more effective than automatic routing, but for tasks like checking distribution lines or compensating for bus delays, automatic routing can offer much higher efficiency and effectiveness. The PCB substrate is generally composed of a resin and glass fiber mixture, which results in varying dielectric constants and thicknesses. Typically, the higher the resin content, the lower the dielectric constant, and the thinner the material. For specific parameters, consult the PCB manufacturer. Additionally, new materials and processes, such as ultra-thick backplanes or low-loss RF boards, are available for specialized applications.
6. How should jumpers be indicated when manually routing a PCB single-layer board?
Jumpers are specialized components in PCB design, consisting of two pads with either fixed or variable-length distances. They can be added during manual routing as necessary. Once added, the jumper will directly connect the pads on the board and will also appear in the bill of materials.
7. In 4-layer PCB designs, why are some boards double-sided while others are not?
There are several factors that influence the use of double-sided routing: 1. Shielding; 2. Heat dissipation; 3. Reinforcement; 4. PCB processing requirements. Regardless of the number of layers, the primary consideration should be the underlying purpose of the routing.
For high-speed designs, we focus mainly on shielding. Surface copper can improve EMC performance, but it should be as continuous as possible to avoid isolated copper islands. If there is significant routing on the surface layer, it may be difficult to maintain the integrity of the copper and can cause issues with the inner layer signals. Therefore, it is recommended not to place copper on surface layers with heavy routing or dense component placement.
8. What countermeasures should be taken when routing clock lines with different frequencies?
For clock line routing, it’s best to perform signal integrity analysis, establish appropriate routing rules, and adhere to these guidelines when laying out the traces.
9. When manually routing a PCB single-layer board, should traces be placed on the top or bottom layer?
If components are placed on the top layer, the routing should be done on the bottom layer.
10. Is it necessary to add ground wire shields on both sides when designing the clock?
Whether or not to include shielded ground traces depends on the crosstalk or EMI concerns on the board. If the shielding is not properly implemented, it could actually exacerbate the problem.
The above answers cover some of the most essential aspects of PCB design and should be helpful for your PCB design work.
If you have any PCB manufacturing needs, please do not hesitate to contact me.Contact me
The impact of wiring topology on signal integrity primarily manifests in the variation of signal arrival times across different nodes. Additionally, reflected signals may not reach a specific node simultaneously, further degrading signal quality. Generally, in a star topology, it is possible to control the lengths of the stubs to ensure that signal transmission and reflection delays are consistent, thus improving signal quality.
Before opting for this topology, the signal topology nodes, the actual operating principles, and the difficulty of routing must be carefully considered. Different buffers affect signal reflections differently, so the star topology cannot effectively address the delay issues on the data/address bus connecting to flash and SDRAM, thus failing to guarantee signal integrity. Moreover, high-speed signals typically involve communication between the DSP and SDRAM, whereas the flash loading speed is relatively low. In high-speed simulations, the focus should be on ensuring clean waveforms at the node where high-speed signals are actively used, rather than worrying about the waveform at the flash node. Compared to other topologies, such as daisy chain, the star topology tends to be more complex, especially when a large number of address/data signals are routed in a star configuration.
1. The attached figure shows the simulation waveform of the Hyperlynx signal data in a DDR–DSP–FLASH topology and a DDR–FLASH–DSP topology at 150 MHz.
It can be observed that in the second configuration, the signal quality at the DSP is better, but the waveform at the FLASH is poorer. The actual functional signal is the waveform at the DSP and DDR.
2. During the EMC test, it was found that the clock signal’s harmonics exceeded the standard significantly, despite a decoupling capacitor being connected to the power supply pin. What aspects of PCB design should be considered to reduce electromagnetic radiation?
The three components of EMC are the radiation source, the transmission path, and the victim. The transmission path can be either through space radiation or cable conduction. To reduce harmonics, it’s important to first understand how the signal propagates. Power supply decoupling addresses the conduction mode propagation. In addition, proper impedance matching and shielding are also essential.
3. Is there any regulation regarding the copper area of the conduction band, specifically the ground plane of a microstrip line?
For microwave circuit design, the size of the ground plane does affect the transmission line’s parameters. The specific calculation method is more complex (see the relevant documentation for EESOFT by Angelen). In general, for PCB digital circuit transmission line simulations, the ground plane’s area has little to no effect on the transmission line parameters, or its impact can be neglected.
4. In PCB design, the ground is typically divided into protective ground and signal ground; power ground is further split into digital ground and analog ground. Why is the ground divided this way?
The primary reason for dividing the ground is to address EMC concerns. This division helps prevent noise from the digital section of the power supply and ground from interfering with other signals, especially analog signals, through conduction paths. As for the division between signal and protective ground, this is related to the role of ESD protection, similar to how lightning rods protect structures. Regardless of the divisions, there ultimately remains a single ground; the difference lies in the method of noise suppression.
5. For PCBs with frequencies above 30 MHz, should automatic routing or manual routing be used? Are the software routing functions the same?
The key factor for high-speed signals is the signal’s rising edge, rather than the absolute frequency or speed. Whether automatic or manual routing is used depends on the capabilities of the routing software. In some cases, manual routing can be more effective than automatic routing, but for tasks like checking distribution lines or compensating for bus delays, automatic routing can offer much higher efficiency and effectiveness. The PCB substrate is generally composed of a resin and glass fiber mixture, which results in varying dielectric constants and thicknesses. Typically, the higher the resin content, the lower the dielectric constant, and the thinner the material. For specific parameters, consult the PCB manufacturer. Additionally, new materials and processes, such as ultra-thick backplanes or low-loss RF boards, are available for specialized applications.
6. How should jumpers be indicated when manually routing a PCB single-layer board?
Jumpers are specialized components in PCB design, consisting of two pads with either fixed or variable-length distances. They can be added during manual routing as necessary. Once added, the jumper will directly connect the pads on the board and will also appear in the bill of materials.
7. In 4-layer PCB designs, why are some boards double-sided while others are not?
There are several factors that influence the use of double-sided routing: 1. Shielding; 2. Heat dissipation; 3. Reinforcement; 4. PCB processing requirements. Regardless of the number of layers, the primary consideration should be the underlying purpose of the routing.
For high-speed designs, we focus mainly on shielding. Surface copper can improve EMC performance, but it should be as continuous as possible to avoid isolated copper islands. If there is significant routing on the surface layer, it may be difficult to maintain the integrity of the copper and can cause issues with the inner layer signals. Therefore, it is recommended not to place copper on surface layers with heavy routing or dense component placement.
8. What countermeasures should be taken when routing clock lines with different frequencies?
For clock line routing, it’s best to perform signal integrity analysis, establish appropriate routing rules, and adhere to these guidelines when laying out the traces.
9. When manually routing a PCB single-layer board, should traces be placed on the top or bottom layer?
If components are placed on the top layer, the routing should be done on the bottom layer.
10. Is it necessary to add ground wire shields on both sides when designing the clock?
Whether or not to include shielded ground traces depends on the crosstalk or EMI concerns on the board. If the shielding is not properly implemented, it could actually exacerbate the problem.
The above answers cover some of the most essential aspects of PCB design and should be helpful for your PCB design work.
If you have any PCB manufacturing needs, please do not hesitate to contact me.Contact me
