1. Introduction
2. The use of high-speed PCB boards is becoming increasingly prevalent, with designs growing progressively intricate. As communication demands rise, so too does the need for faster signal transmission and processing speeds. The term “high-speed circuit” encompasses two main aspects. Firstly, it denotes circuits operating at high frequencies—typically at or above 45MHz to 50MHz—which constitute a significant portion of the entire system. Secondly, it includes signals where the rise time is less than 6 times the signal transmission delay, irrespective of the specific signal frequency.
2. Basic content of high-speed PCB board design
High-speed circuit design constitutes an increasingly significant proportion of modern circuit design, becoming progressively challenging. Its resolution necessitates not only high-speed devices but also the designer’s acumen and meticulous effort. Thorough study and analysis of specific scenarios are essential to address existing issues in high-speed circuits. Generally, design primarily encompasses three facets: signal integrity design, electromagnetic compatibility design, and power integrity design.
2.1 Signal Integrity Design
Signal integrity pertains to the quality of signals on signal lines. Optimal signal integrity implies that signals achieve required voltage levels precisely when needed. Poor signal integrity results not from any single factor but from a combination of factors in board-level design. Particularly in high-speed circuits, issues like excessively fast chip switching speeds, inadequate component layout, and suboptimal circuit interconnections contribute to signal integrity problems. These encompass crosstalk, reflection, overshoot, undershoot, oscillation, and signal delay.
2.1.1 Crosstalk
Crosstalk denotes undesired coupling between adjacent signal lines, induced by mutual inductance and capacitance. This phenomenon causes noise on the lines, categorized into inductive crosstalk and capacitive crosstalk, generating coupled currents and voltages respectively. Crosstalk requires consideration when signal edge rates are below 1ns. Simulation tools such as Cadence enable the simulation of up to 6 coupled signal lines, allowing adjustment of parameters like PCB board dielectric constant, medium thickness, copper immersion thickness, signal line length, width, and spacing. During simulation, a specified damaged signal line investigates interference caused by other signal lines, assessing induced voltages to ensure spacing and parallel lengths meet requirements.
2.1.2 Reflection
Reflection is the echo of a signal along a transmission line, analogous to light reflecting through varying media, where not all signal power reaches the load due to partial reflection. In high-speed PCBs, adherence to transmission line theory is crucial, ensuring impedance matching between source and load to prevent reflections. Mismatches cause voltage reflections back to the source, potentially altering logical states and causing data reception errors. Wiring geometry, improper terminations, connector transitions, and power plane discontinuities contribute to such reflections. Varied wiring strategies can affect multiple receivers differently, necessitating careful selection based on simulation results.
2.1.3 Overshoot and Undershoot
Overshoot results from excessively rapid circuit switching and reflections, where signal peaks exceed voltage thresholds, potentially activating protection diodes prematurely or damaging devices. Conversely, undershoot involves signal troughs. Both phenomena can induce clock or data errors, mitigated by appropriate endpoint additions.
2.1.4 Oscillations and Jitter
Oscillations involve repeated overshoots and undershoots, caused by impedance mismatches and excessive line inductance and capacitance. Oscillations near logic thresholds can disrupt logic operations. Strategies like proper termination and PCB parameter adjustments can minimize, though not entirely eliminate, oscillations. Cadence’s signal simulation software aids in measuring these signal integrity issues via reflection parameters.
2.1.5 Signal Delay
Signal delay must conform to specified timing sequences for correct data reception, critical as signal edge and clock rates increase. Gate delays, influenced by transmission line capacitance and inductance, coupled with reflections, impact data reception times. Cadence simulation software assesses parameters like Settledelay, Switchdelay, and Propdelay, essential for ensuring signal timing meets device requirements.
2.2 Electromagnetic Compatibility Design
Electromagnetic compatibility encompasses electromagnetic interference (EMI) and susceptibility, addressing excessive radiation and sensitivity. EMI includes conducted and radiated types, wherein conductive interference transmits signals between electrical networks via current flow. PCBs manifest this as ground and power noise. Radiated interference occurs when signals propagate as electromagnetic waves, potentially affecting other networks. Design considerations include device and PCB-level selection, grounding system design, shielding, and filtering, crucial for EMI compliance.
2.3 Power Integrity Design
Power supply and ground integrity are pivotal in high-speed circuits, intimately linked with signal integrity. Signal distortions often stem from power supply issues, such as excessive ground bounce, improper decoupling capacitor design, or inadequate power plane segmentation. Design strategies involve optimizing power distribution systems, dividing large boards into smaller ones, selecting decoupling capacitors based on ground bounce noise, and considering overall current distribution. Simulation tools aid in designing low-impedance power supply systems and optimizing decoupling capacitors for reduced ground bounce.
By meticulously addressing these aspects—signal integrity, electromagnetic compatibility, and power integrity—high-speed PCB designs can mitigate critical issues, ensuring reliable circuit performance in modern electronic applications.
2. The use of high-speed PCB boards is becoming increasingly prevalent, with designs growing progressively intricate. As communication demands rise, so too does the need for faster signal transmission and processing speeds. The term “high-speed circuit” encompasses two main aspects. Firstly, it denotes circuits operating at high frequencies—typically at or above 45MHz to 50MHz—which constitute a significant portion of the entire system. Secondly, it includes signals where the rise time is less than 6 times the signal transmission delay, irrespective of the specific signal frequency.
2. Basic content of high-speed PCB board design
High-speed circuit design constitutes an increasingly significant proportion of modern circuit design, becoming progressively challenging. Its resolution necessitates not only high-speed devices but also the designer’s acumen and meticulous effort. Thorough study and analysis of specific scenarios are essential to address existing issues in high-speed circuits. Generally, design primarily encompasses three facets: signal integrity design, electromagnetic compatibility design, and power integrity design.
2.1 Signal Integrity Design
Signal integrity pertains to the quality of signals on signal lines. Optimal signal integrity implies that signals achieve required voltage levels precisely when needed. Poor signal integrity results not from any single factor but from a combination of factors in board-level design. Particularly in high-speed circuits, issues like excessively fast chip switching speeds, inadequate component layout, and suboptimal circuit interconnections contribute to signal integrity problems. These encompass crosstalk, reflection, overshoot, undershoot, oscillation, and signal delay.
2.1.1 Crosstalk
Crosstalk denotes undesired coupling between adjacent signal lines, induced by mutual inductance and capacitance. This phenomenon causes noise on the lines, categorized into inductive crosstalk and capacitive crosstalk, generating coupled currents and voltages respectively. Crosstalk requires consideration when signal edge rates are below 1ns. Simulation tools such as Cadence enable the simulation of up to 6 coupled signal lines, allowing adjustment of parameters like PCB board dielectric constant, medium thickness, copper immersion thickness, signal line length, width, and spacing. During simulation, a specified damaged signal line investigates interference caused by other signal lines, assessing induced voltages to ensure spacing and parallel lengths meet requirements.
2.1.2 Reflection
Reflection is the echo of a signal along a transmission line, analogous to light reflecting through varying media, where not all signal power reaches the load due to partial reflection. In high-speed PCBs, adherence to transmission line theory is crucial, ensuring impedance matching between source and load to prevent reflections. Mismatches cause voltage reflections back to the source, potentially altering logical states and causing data reception errors. Wiring geometry, improper terminations, connector transitions, and power plane discontinuities contribute to such reflections. Varied wiring strategies can affect multiple receivers differently, necessitating careful selection based on simulation results.
2.1.3 Overshoot and Undershoot
Overshoot results from excessively rapid circuit switching and reflections, where signal peaks exceed voltage thresholds, potentially activating protection diodes prematurely or damaging devices. Conversely, undershoot involves signal troughs. Both phenomena can induce clock or data errors, mitigated by appropriate endpoint additions.
2.1.4 Oscillations and Jitter
Oscillations involve repeated overshoots and undershoots, caused by impedance mismatches and excessive line inductance and capacitance. Oscillations near logic thresholds can disrupt logic operations. Strategies like proper termination and PCB parameter adjustments can minimize, though not entirely eliminate, oscillations. Cadence’s signal simulation software aids in measuring these signal integrity issues via reflection parameters.
2.1.5 Signal Delay
Signal delay must conform to specified timing sequences for correct data reception, critical as signal edge and clock rates increase. Gate delays, influenced by transmission line capacitance and inductance, coupled with reflections, impact data reception times. Cadence simulation software assesses parameters like Settledelay, Switchdelay, and Propdelay, essential for ensuring signal timing meets device requirements.
2.2 Electromagnetic Compatibility Design
Electromagnetic compatibility encompasses electromagnetic interference (EMI) and susceptibility, addressing excessive radiation and sensitivity. EMI includes conducted and radiated types, wherein conductive interference transmits signals between electrical networks via current flow. PCBs manifest this as ground and power noise. Radiated interference occurs when signals propagate as electromagnetic waves, potentially affecting other networks. Design considerations include device and PCB-level selection, grounding system design, shielding, and filtering, crucial for EMI compliance.
2.3 Power Integrity Design
Power supply and ground integrity are pivotal in high-speed circuits, intimately linked with signal integrity. Signal distortions often stem from power supply issues, such as excessive ground bounce, improper decoupling capacitor design, or inadequate power plane segmentation. Design strategies involve optimizing power distribution systems, dividing large boards into smaller ones, selecting decoupling capacitors based on ground bounce noise, and considering overall current distribution. Simulation tools aid in designing low-impedance power supply systems and optimizing decoupling capacitors for reduced ground bounce.
By meticulously addressing these aspects—signal integrity, electromagnetic compatibility, and power integrity—high-speed PCB designs can mitigate critical issues, ensuring reliable circuit performance in modern electronic applications.
