As a PCB expert, you are familiar with the challenges that come with designing PCB boards. In order to address issues like skin effect, dielectric loss, vias and connectors, differential signaling, cabling considerations, power distribution, and EMI control, the use of PCB design tools is essential. The advancement in communication and computer technology has propelled high-speed PCB design into the gigabit realm. The utilization of new high-speed devices has enabled high-speed long-distance transmission on backplanes and single boards. Signal integrity issues (SI), power integrity, and electromagnetic compatibility problems have become more pronounced as a result of these developments.

Signal integrity refers to the quality of signal transmission on the signal line. The main problems include reflection, oscillation, timing, ground bounce, and crosstalk. Poor signal integrity is not caused by a single factor, but by a combination of factors in board-level design. In the PCB design of gigabit equipment, a good signal integrity design requires engineers to fully consider the components, transmission line interconnection scheme, power distribution, and EMC aspects. EDA tools for high-speed PCB design have evolved from pure simulation verification to a combination of design and verification, helping designers set rules early in design to avoid errors instead of finding problems later in design. As data rates increase and designs become more complex, high-speed PCB system analysis tools become more necessary. These tools include timing analysis, signal integrity analysis, design space parameter sweep analysis, EMC design, power system stability analysis, and more.

Here we will focus on some of the issues that should be considered in signal integrity analysis in the PCB design of gigabit devices.

1. High-Speed Devices and Device Models:

Although the gigabit transmit and receive component suppliers will provide design information about the chip, there is also a process for the device supplier to understand the signal integrity of the new device, so the design guidelines given by the device supplier may not be mature. The design constraints given by the device suppliers are usually very strict, and it will be very difficult for the design engineer to meet all the design rules. Therefore, it is necessary for signal integrity engineers to use simulation analysis tools to analyze the supplier’s constraint rules and actual designs, investigate and optimize component selection, topology, matching schemes, and values of matching components, and finally develop solutions to ensure signal integrity and PCB layout and routing rules.

The simulation analysis of gigabit signals has become very important, and the role of the device model in the signal integrity analysis work has been paid more and more attention. Component models usually include IBIS models and Spice models. Because the board-level simulation only cares about the signal response from the output pins to the input pins through the interconnection system, and IC manufacturers do not want to leak detailed circuit information inside the device. The simulation time of the transistor-level Spice model is usually unbearable, so the IBIS model is used in high-speed PCBs.

As the data transmission rate increases, the differential devices developed on the basis of ECL technology have been greatly developed. The LVDS standard and CML, among others, have made gigabit signal transmission possible. The IBIS standard is still applicable to the design of gigabit systems due to the circuit structure and the corresponding differential technology application. Since the IBIS model is not suitable for many Gbps devices that have pre-emphasis circuits for loss compensation, the Spice model is more applicable when the data rate is 10Gbps or above.

2. Loss Effect:

When the signal frequency increases, the attenuation on the transmission line cannot be ignored. At this time, it is necessary to consider the loss caused by the equivalent resistance of the conductor in series and the equivalent conductance of the medium in parallel, and the lossy transmission line model needs to be used for analysis.

3. Effects of Vias and Connectors:

The vias transmit the signal to the other side of the board. In gigabit system design simulation, to consider the effect of vias, a via model is required. The model structure of the via is in the form of a series resistance R, an inductance L, and a parallel capacitor C. In the design of the gigabit system PCB, the influence of the connector should be considered in particular. Now the development of high-speed connector technology can well ensure the continuity of the impedance and the ground plane during signal transmission.

4. Differential Signaling and Routing Considerations:

Differential signal has the advantages of strong anti-interference and high transmission rate. In gigabit signal transmission, it can better reduce the influence of crosstalk and EMI. Its coupling forms include edge coupling and up-down coupling, loose coupling, and tight coupling. The specific differential routing rules should consider the effects of impedance continuity, loss, crosstalk, and trace length differences according to different situations.

5. Power Distribution and EMC:

The increase in data transfer rates, accompanied by faster edge rates, requires power supply stability over a wider frequency band. A high-speed system may pass a transient current of 10A and require a power supply ripple of 50mV, which means that the impedance of the power distribution network must be within 5mΩ within a certain frequency range. In the design of gigabit systems, it is necessary to avoid the interference of synchronization noise (SSN) and ensure that the power distribution system has a low impedance in the bandwidth range.

6. EMC :

EMC stands for Electromagnetic Compatibility, and the resulting problems include excessive electromagnetic radiation and susceptibility to electromagnetic radiation. At present, there are software tools for EMC simulation. The usual practice is to apply the design rules that control EMC to each link of the design, to achieve rule-driven and control in each link of the design, and after the design is tested and verified, new rules can be formed and applied to the new PCB board design.

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