1. The connection between PCB trace length matching and the frequency of differential pairs
2. Proper matching of trace lengths and frequencies must consider the entire bandwidth of the signal traveling along the traces.
3. This topic has been extensively studied in differential serial protocols over recent years, with standards like USB4 imposing specific criteria on wideband signal integrity metrics.
4. Examples of wideband signal integrity metrics include:
5. Integrated differential crosstalk
6. Integral differential insertion loss
7. Integral differential return loss
8. Integral differential impedance deviation
By “integration,” we refer to the fact that certain aspects of signal integrity are applicable across the relevant frequency spectrum. For instance, when considering differential crosstalk, our goal is to minimize the differential crosstalk between two differential pairs to a level below a specified limit defined by the signaling standard. This will become clearer when we discuss the importance of matching trace lengths shortly.
In the time domain, our focus is solely on the midpoint transition when both ends of a differential pair switch between HIGH and LOW states (assuming a binary system) simultaneously. Jitter presents a challenge in this context, as it restricts line lengths to a specific tolerance, preventing perfect simultaneous transitions at the ends of a pair of lines. In the frequency domain, we must account for dispersion arising from several sources:
1. **Geometric Dispersion:** This results from the boundary conditions and geometry of the interconnects, affecting how the impedance varies with geometry.
2. **Dielectric Dispersion:** This occurs within the PCB substrate and is independent of the interconnect’s geometry, encompassing Dk dispersion and loss.
3. **Roughness Dispersion:** This additional dispersion source stems from the copper roughness model’s causality and the skin effect at high frequencies.
4. **Fiber Braiding Dispersion:** Fiber braiding within PCB laminates introduces periodic changes in dispersion throughout the interconnect.
These sources of dispersion are always present in the wiring, resulting in the impedance, speed, and all other metrics of signal integrity being frequency-dependent. Below, we illustrate how dispersion in the real part of the Dk affects the impedance of microstrip wiring.
**Signal Speed**
If you’re familiar with transmission line theory, you’re aware that impedance is closely tied to signal speed. Taking the signal speed of PCB wiring as an example, the figure below illustrates the group and phase velocities of simulated traces exhibiting roughness and dispersion.
The group and phase velocities of a sample ribbon line signal, considering copper roughness and dielectric dispersion.
Here, we observe that phase velocity can vary significantly over a broad frequency range—up to a factor of 2 from 1 MHz to 20 GHz. The variation in phase velocity is crucial as it indicates how different frequency components propagate along the interconnect. This variability highlights the challenges of achieving PCB trace length matching and frequency alignment in practical applications. We need to account for all frequencies, rather than just selecting a few individual ones.
**Broadband Length Matching and Frequency**
To establish a measure of length matching, we must consider the allowable length deviation for a given signaling standard, termed as time deviation TLIM. The following equations represent length tolerances and permissible timing mismatches:
A change in length relative to the allowable temporal variation.
Here, the function K represents the propagation constant of the signal along the interconnect, which is also frequency-dependent due to dispersion. Statistical methods, specifically the “Lp norm,” can help address allowable length mismatches. Without diving deeply into the underlying mathematics, it’s important to understand that this measure equates to calculating the RMS difference between a function and an average that differs only by a constant. This makes it an excellent mathematical tool for addressing variations between target design values and signal integrity metrics (impedance, impulse response attenuation/delay, crosstalk intensity, etc.).
Using the Lp norm, we can reformulate the permissible length mismatches based on upper limits defined by TLIM for timing mismatches:
A change in length according to the allowable temporal variation.
When designing a PCB with wideband signal integrity metrics in mind, the equation above can serve as a constraint: while determining the dimensions of a transmission line, this can impact the total permissible length deviation between any two lines within or at the ends of a differential pair in high-speed parallel protocols. The integral is straightforward to compute if the transmission line’s propagation constant is known, which can be derived using a field solver or through manual analysis of standard transmission line geometries.
To provide some numerical context, using the phase velocity from the analog strip shown earlier, we find that the allowable length mismatch between parallel single-ended fully isolated traces is 2.07 mm, with a timing mismatch of 10 ps, given that this value is permissible. Notably, for 10 ps, this represents a significant portion of the edge rate for many high-speed digital signals. For the ribbon line simulated above, this corresponds to an allowable length mismatch of 1.3041 mm.
2. Proper matching of trace lengths and frequencies must consider the entire bandwidth of the signal traveling along the traces.
3. This topic has been extensively studied in differential serial protocols over recent years, with standards like USB4 imposing specific criteria on wideband signal integrity metrics.
4. Examples of wideband signal integrity metrics include:
5. Integrated differential crosstalk
6. Integral differential insertion loss
7. Integral differential return loss
8. Integral differential impedance deviation
By “integration,” we refer to the fact that certain aspects of signal integrity are applicable across the relevant frequency spectrum. For instance, when considering differential crosstalk, our goal is to minimize the differential crosstalk between two differential pairs to a level below a specified limit defined by the signaling standard. This will become clearer when we discuss the importance of matching trace lengths shortly.
In the time domain, our focus is solely on the midpoint transition when both ends of a differential pair switch between HIGH and LOW states (assuming a binary system) simultaneously. Jitter presents a challenge in this context, as it restricts line lengths to a specific tolerance, preventing perfect simultaneous transitions at the ends of a pair of lines. In the frequency domain, we must account for dispersion arising from several sources:
1. **Geometric Dispersion:** This results from the boundary conditions and geometry of the interconnects, affecting how the impedance varies with geometry.
2. **Dielectric Dispersion:** This occurs within the PCB substrate and is independent of the interconnect’s geometry, encompassing Dk dispersion and loss.
3. **Roughness Dispersion:** This additional dispersion source stems from the copper roughness model’s causality and the skin effect at high frequencies.
4. **Fiber Braiding Dispersion:** Fiber braiding within PCB laminates introduces periodic changes in dispersion throughout the interconnect.
These sources of dispersion are always present in the wiring, resulting in the impedance, speed, and all other metrics of signal integrity being frequency-dependent. Below, we illustrate how dispersion in the real part of the Dk affects the impedance of microstrip wiring.
**Signal Speed**
If you’re familiar with transmission line theory, you’re aware that impedance is closely tied to signal speed. Taking the signal speed of PCB wiring as an example, the figure below illustrates the group and phase velocities of simulated traces exhibiting roughness and dispersion.
The group and phase velocities of a sample ribbon line signal, considering copper roughness and dielectric dispersion.
Here, we observe that phase velocity can vary significantly over a broad frequency range—up to a factor of 2 from 1 MHz to 20 GHz. The variation in phase velocity is crucial as it indicates how different frequency components propagate along the interconnect. This variability highlights the challenges of achieving PCB trace length matching and frequency alignment in practical applications. We need to account for all frequencies, rather than just selecting a few individual ones.
**Broadband Length Matching and Frequency**
To establish a measure of length matching, we must consider the allowable length deviation for a given signaling standard, termed as time deviation TLIM. The following equations represent length tolerances and permissible timing mismatches:
A change in length relative to the allowable temporal variation.
Here, the function K represents the propagation constant of the signal along the interconnect, which is also frequency-dependent due to dispersion. Statistical methods, specifically the “Lp norm,” can help address allowable length mismatches. Without diving deeply into the underlying mathematics, it’s important to understand that this measure equates to calculating the RMS difference between a function and an average that differs only by a constant. This makes it an excellent mathematical tool for addressing variations between target design values and signal integrity metrics (impedance, impulse response attenuation/delay, crosstalk intensity, etc.).
Using the Lp norm, we can reformulate the permissible length mismatches based on upper limits defined by TLIM for timing mismatches:
A change in length according to the allowable temporal variation.
When designing a PCB with wideband signal integrity metrics in mind, the equation above can serve as a constraint: while determining the dimensions of a transmission line, this can impact the total permissible length deviation between any two lines within or at the ends of a differential pair in high-speed parallel protocols. The integral is straightforward to compute if the transmission line’s propagation constant is known, which can be derived using a field solver or through manual analysis of standard transmission line geometries.
To provide some numerical context, using the phase velocity from the analog strip shown earlier, we find that the allowable length mismatch between parallel single-ended fully isolated traces is 2.07 mm, with a timing mismatch of 10 ps, given that this value is permissible. Notably, for 10 ps, this represents a significant portion of the edge rate for many high-speed digital signals. For the ribbon line simulated above, this corresponds to an allowable length mismatch of 1.3041 mm.
