1. problem
In high-speed circuit design, the inductance and capacitance on the circuit board may make the wiring equivalent to transmission lines. Improper placement of terminal components or incorrect wiring of high-speed signals can cause transmission line effects, resulting in incorrect system data output, abnormal circuit operation, and even complete failure. Based on the transmission line model, it can be concluded that transmission lines will bring adverse effects such as signal reflection, crosstalk, electromagnetic interference, power and ground noise. In order to design a reliable high-speed PCB board, the design must be comprehensively and meticulously considered, addressing potential unreliable issues in wiring layout, shortening product development cycles, and enhancing market competitiveness. This article will discuss some layout and wiring principles that need to be paid attention to when using the PROTEL design software to implement high-speed circuit board design, and provide some practical and validated high-speed circuit layout and wiring techniques to improve the reliability and effectiveness of high-speed circuit board design. The research results indicate that this design method can shorten the product development cycle and enhance market competitiveness< br/>
2. Layout Design of the High-Frequency System
In the PCB design of a circuit, layout is a crucial aspect. The quality of the layout directly affects the wiring efficiency and system reliability, making it one of the most challenging tasks in printed circuit board design. The complex environment of high-frequency PCB boards complicates the application of theoretical knowledge, necessitating that layout designers possess substantial experience in high-speed PCB manufacturing. This expertise helps to avoid missteps during the design process and enhances the reliability and effectiveness of circuit operation. During the layout process, comprehensive considerations must include mechanical structure, heat dissipation, electromagnetic interference, future wiring convenience, and aesthetic appearance. Initially, the entire circuit’s functions should be divided, separating high-frequency circuits from low-frequency circuits, and analog circuits from digital circuits. This helps to avoid transmission delays caused by long traces and improves the decoupling effect of capacitors. Additionally, it is vital to pay attention to the relative positioning and orientation of pins and circuit components to minimize mutual influence. All high-frequency components should be positioned away from the chassis and other metallic surfaces to reduce parasitic coupling. Furthermore, attention must be given to thermal and electromagnetic interactions between components during layout. These effects are particularly pronounced in high-frequency systems, necessitating measures to maintain distance, isolate, dissipate heat, and provide shielding. High-power rectifier tubes and adjustment tubes should be equipped with heat sinks and positioned away from transformers. Heat-resistant components like electrolytic capacitors should be distanced from heat-generating components, as heat can dry out the electrolyte, leading to increased resistance and poor performance, ultimately affecting circuit stability. Sufficient space should be allocated in the layout for guard structures to prevent the introduction of various parasitic couplings. To mitigate electromagnetic coupling between coils on the PCB, coils should ideally be positioned at right angles to each other to reduce the coupling coefficient. Vertical plate isolation can also be employed, with components directly soldered onto the circuit. The shorter the leads, the better. Avoid using connectors and solder pads, as they introduce distributed capacitance and inductance between adjacent pads. It is crucial to avoid placing high-noise components near the crystal oscillator, RIN, analog voltage, and reference voltage signal traces. When ensuring inherent quality and reliability, the overall aesthetics and reasonable board planning should also be considered. Components should be aligned parallel or perpendicular to the board surface and the main board edge. The distribution of components on the surface should be as uniform as possible, ensuring consistent density. This not only improves aesthetics but also facilitates installation, soldering, and mass production.
3. Wiring of the High-Frequency System
In high-frequency circuits, the distribution parameters of resistance, capacitance, inductance, and mutual inductance in connecting wires must not be overlooked. From an anti-interference perspective, rational wiring aims to minimize line resistance, distributed capacitance, and stray inductance. This reduction also helps to limit stray magnetic fields, suppressing the distributed capacitance, leakage magnetic flux, and electromagnetic mutual inductance resulting from circuit noise. The use of PROTEL design tools is widespread in China; however, many designers prioritize the “through rate” and neglect adjustments for device characteristics, leading to significant resource waste and underutilization of the new devices’ capabilities. Below are some unique functions that the PROTEL99 SE tool offers:
1) It is preferable to keep the leads between high-frequency circuit device pins as straight as possible. Use straight lines whenever feasible. When bends are necessary, employ 45° angles or circular arcs to reduce external emissions and mutual coupling of high-frequency signals. When routing with PROTEL, select 45-Degree or Rounded in “Routing Corners” under the “Rules” in the “Design” menu. You can also quickly switch between lines using the Shift+Space keys.
2) The leads between high-frequency circuit device pins should be as short as possible. PROTEL 99 effectively achieves short wiring by making routing reservations for key high-speed networks before automatic wiring occurs. Select “Shortest” in “Routing Topology” under “Design” menu “Rules”.
3) Minimize the alternation between lead layers connecting high-frequency circuit device pins, meaning fewer vias should be used. Each via can introduce approximately 0.5 pF of distributed capacitance; thus, reducing the number of vias can significantly increase speed.
4) Ensure to address “cross-interference” or crosstalk caused by parallel signal line wiring in high-frequency circuit wiring. If parallel wiring is unavoidable, consider placing a large area of “ground” on the opposite side of the parallel signal lines to significantly reduce interference. While parallel lines within the same layer are almost unavoidable, lines in adjacent layers should be oriented perpendicular to each other. This alignment is easily managed but often overlooked in PROTEL: select “Horizontal” for the Top layer and “Vertical” for the Bottom layer in “Routing Layers” under the “Design” menu. Additionally, the “Polygon Plane” function in “Place” allows for polygonal grid copper foil surfaces, effectively connecting this copper to the circuit’s GND, thereby enhancing high-frequency anti-interference capabilities, and benefiting heat dissipation and PCB strength.
5) Implement ground wire measures surrounding particularly important signal lines or localized units. The “Outline Selected Objects” tool in “Tools” can automatically ground selected important signal lines, such as the oscillator circuit LT and X1.
6) Generally, the power line and ground line should be wider than the signal line. Use “Classes” in the “Design” menu to categorize networks into power networks and signal networks. This classification enables easy application of line width switching for power and signal lines with wiring rules.
7) Ensure that no traces form loops and that ground connections avoid current loops. A loop can induce significant interference; therefore, utilizing a daisy-chain wiring method can effectively prevent loops, branches, or tree stumps, albeit posing challenges for wiring.
8) Estimate the current through the power line based on various chip data and design to determine the necessary wire width. The formula W (line width) ≥ L (mm/A) × I (A) provides a basis for this calculation. It is advisable to increase the power line width according to the current size to minimize loop resistance. Additionally, align the power and ground line directions with data transmission for enhanced anti-noise capability. If necessary, incorporate high-frequency choke devices, made of ferrite with copper wire winding, into the power and ground lines to mitigate high-frequency noise conduction.
9) Maintain uniform wiring width across the same network. Variations in line width can lead to uneven characteristic impedance, causing reflections at high transmission speeds—a design issue to avoid. Furthermore, increase the width of parallel lines; when the center distance does not exceed three times the line width, 70% of the electric field can be retained without mutual interference, a principle known as the 3W principle. This strategy helps overcome the influence of distributed capacitance and inductance caused by parallel lines.
4. Design of Power Line and Ground Wire
To mitigate voltage drops caused by power supply noise and line impedance in high-frequency circuits, the reliability of the power supply system must be thoroughly assessed. Typically, two solutions are available: employing power bus technology for wiring or using a dedicated power supply layer. The latter is more complex and costly compared to network-type power bus technology, which allows for wiring where each component belongs to a distinct loop, balancing current on each bus and reducing voltage drop due to line impedance. High-frequency transmission may require large areas of copper in conjunction with a nearby low-resistance ground plane for multi-point grounding. Because the inductive reactance of ground leads increases with frequency and length, the common ground impedance escalates with higher operating frequencies, exacerbating electromagnetic interference. Thus, ground wire length should be minimized while increasing the ground loop area. Positioning one or more high-frequency decoupling capacitors at the power and ground terminals of the chip provides a nearby high-frequency channel for integrated chip transient current, minimizing current passage through larger loop power supply lines and greatly reducing radiated noise. A monolithic capacitive ceramic capacitor with optimal high-frequency characteristics should be selected as a decoupling capacitor. Large-capacity tantalum or polyester capacitors should replace electrolytic capacitors as energy storage components for circuit charging due to the high inductance of electrolytic capacitors being ineffective at high frequencies. If electrolytic capacitors are necessary, pair them with decoupling capacitors exhibiting excellent high-frequency PCB characteristics.
