The following discusses the measurement of Surface Insulation Resistance (SIR) in PCBs:
1. SIR (Surface Insulation Resistance) is typically employed to assess the reliability of printed circuit boards.
2. The testing method involves interleaving pairs of electrodes on a PCB to create a specific pattern, followed by the application of solder paste.
3. A defined bias voltage (BIAS VOLTAGE) is then applied under controlled high temperature and high humidity conditions.
4. After a predetermined testing duration (24H, 48H, 96H, 168H), the process monitors for any instantaneous short circuits or insulation failures, as well as gradual leakage between the lines.
5. This test is also beneficial in determining whether residues from flux or other chemicals in the solder paste remain on the PCB surface, potentially impacting the electrical characteristics of electronic components.
6. Generally, this approach is used to measure static surface insulation resistance (SIR) and dynamic ion migration (ION MIGRATION).
7. Additionally, it serves as a test for Conductive Anodic Filament (CAF) phenomena, which involve fiber leakage.
Note: CAF is primarily utilized to assess the impact of flux on the moisture absorption of PCB boards and the delamination of glass fiber surfaces.
Surface Insulation Resistance (SIR) is extensively employed to evaluate how contaminants affect the reliability of assemblies. In comparison to other methods, SIR offers the advantage of not only detecting localized pollution but also measuring the effects of both ionic and non-ionic pollutants on the reliability of printed circuit boards (PCBs). Its effectiveness surpasses that of other methods (such as cleanliness tests, silver chromate tests, etc.), making it both efficient and practical.
As PCB layouts become denser and solder joints are positioned more closely together, this experiment can also serve as a reference for evaluating the usability of solder paste flux.
Comb Pattern: The comb circuit represents a type of “multi-finger” interleaved dense circuit pattern, which is suitable for high-voltage testing of board cleanliness and the insulation of green paint.
SIR measurement standard: IPC-TM-650
▼ The test board for the SIR experiment features a board with four pairs of interlaced electrodes connected to form a comb pattern (Pattern).
PCB impedance test
▼ A single group of SIR experiments comprises a pair of staggered electrodes connected into a comb pattern (Pattern), as shown in the magnified view.
PCB impedance test
During SIR measurement, solder paste should be printed onto the comb pattern (Pattern), and then the board is placed vertically into the SIR test setup, which has been printed with solder paste and positioned in the environmental testing machine. A bias voltage of 45 to 50 VDC is applied under the following environmental test conditions:
85 ± 2 degrees Celsius + 20% RH for 3 hours
↓ At least 15 minutes
85 ± 2 degrees Celsius + 85% RH After at least 1 hour, apply the 50 VDC bias
↓ Measure the SIR value using 100 VDC after 24 hours
↓ After an additional 24 hours, measure the SIR value with 100 VDC (total of 48 hours)
↓ After another 48 hours, measure the SIR value using 100 VDC (total of 96 hours)
↓ After 96 hours, measure the SIR value with 100 VDC (total of 168 hours)
Record the changes in SIR at regular intervals.
