By definition, multilayer boards (MLBs) consist of three or more circuit layers. Initially confined to sophisticated industrial electronic products, MLBs have now become ubiquitous across all electronic devices, including consumer products such as portable video cameras, cellular phones, and audio discs.
As personal computers and workstations gain more power, they are increasingly replacing mainframe computers and supercomputers in many applications. Consequently, the demand for highly complex MLBs with over 70 layers is diminishing, although the manufacturing technology for such boards remains established. On the opposite end of the layer spectrum, thin and high-density MLBs with 4 to 8 layers have become mainstream. The push for thinner MLBs continues, facilitated by ongoing advancements in materials and equipment capable of handling thin core materials.
PCBs have had to evolve to meet the challenges of higher speed, higher density, and the proliferation of surface-mount components on both sides of the board. This evolution has significantly increased the need for inter-layer communication. Simultaneously, the available space for vias has decreased, driving a trend toward smaller vias, increased via density per board, and a decline in through-hole vias that penetrate the entire board. Consequently, the adoption of buried and blind vias has become standard practice in multilayer board technology, driven by the necessity for higher package density.
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Image 1: GPS Multilayer Board Back Drill Hole
One of the immediate issues that arise from these trends is the problem of drilling and its associated costs in the fabrication process. Previously, printed wiring boards were stacked three high on drilling machines, but now they must be drilled individually due to the increased number of holes per board needed for vias. This situation presents a significant challenge for fabricators. The lack of drilling capacity is driving up the demand for additional machines, resulting in a sharp rise in drilling costs. Consequently, alternative methods for creating vias are being developed. These pressures will persist, making processes like the one described here—or its equivalents—increasingly crucial as the push toward miniaturization continues and drilling individual holes becomes less feasible.
Surface Laminar Circuits (SLCs) represent a notable MLB technology developed for forming vias, particularly surface blind via holes. The process for fabricating a board using surface laminar circuits is as follows:
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Image 2: Multilayer PCBA
A different approach to creating small vias has been implemented by Dyconex AG of Switzerland. After forming ground and power patterns on the panel, the panel undergoes oxide treatment, followed by lamination of polyimide-backed copper foil onto the panel. Holes in the copper are formed using a chemical etching process, and the insulating polyimide material beneath the holes is removed by plasma etching. PCBs manufactured in this manner are known as DYCOstrate.
In other similar technologies, various dielectric materials are utilized, which are removed using alkaline solutions. The remainder of the process parallels that of SLC; specifically, holes are metallized via thick copper deposition using either electroless or galvanic plating, and the circuit pattern is established through a tent-and-etch process.
In both SLC and DYCOstrate approaches, through-holes can also be created using conventional drilling and plating processes, alongside surface blind via holes. Cost Impact: The manufacturing cost associated with these sequential technologies may not necessarily be lower than that of conventional MLB technology, primarily due to the laminating press operation. However, considering that the cost of creating standard holes in a board can constitute up to 30 percent of the total manufacturing cost, and the creation of holes in these processes is comparatively economical, the overall cost for achieving equivalent functionality can be reduced.
Image 3: Microvia Aspect Ratio
Additionally, the fine pattern capability of this process is excellent. For instance, an eight-layer conventional structure can frequently be condensed into a four-layer configuration, thereby reducing the overall cost while maintaining the same packaging density.
As personal computers and workstations gain more power, they are increasingly replacing mainframe computers and supercomputers in many applications. Consequently, the demand for highly complex MLBs with over 70 layers is diminishing, although the manufacturing technology for such boards remains established. On the opposite end of the layer spectrum, thin and high-density MLBs with 4 to 8 layers have become mainstream. The push for thinner MLBs continues, facilitated by ongoing advancements in materials and equipment capable of handling thin core materials.
PCBs have had to evolve to meet the challenges of higher speed, higher density, and the proliferation of surface-mount components on both sides of the board. This evolution has significantly increased the need for inter-layer communication. Simultaneously, the available space for vias has decreased, driving a trend toward smaller vias, increased via density per board, and a decline in through-hole vias that penetrate the entire board. Consequently, the adoption of buried and blind vias has become standard practice in multilayer board technology, driven by the necessity for higher package density.
Sure, here are the edits to the provided text:
—
Image 1: GPS Multilayer Board Back Drill Hole
One of the immediate issues that arise from these trends is the problem of drilling and its associated costs in the fabrication process. Previously, printed wiring boards were stacked three high on drilling machines, but now they must be drilled individually due to the increased number of holes per board needed for vias. This situation presents a significant challenge for fabricators. The lack of drilling capacity is driving up the demand for additional machines, resulting in a sharp rise in drilling costs. Consequently, alternative methods for creating vias are being developed. These pressures will persist, making processes like the one described here—or its equivalents—increasingly crucial as the push toward miniaturization continues and drilling individual holes becomes less feasible.
Surface Laminar Circuits (SLCs) represent a notable MLB technology developed for forming vias, particularly surface blind via holes. The process for fabricating a board using surface laminar circuits is as follows:
—
I’ve clarified some sentences for better readability and adjusted the structure slightly. Let me know if you need further adjustments!
Image 2: Multilayer PCBA
A different approach to creating small vias has been implemented by Dyconex AG of Switzerland. After forming ground and power patterns on the panel, the panel undergoes oxide treatment, followed by lamination of polyimide-backed copper foil onto the panel. Holes in the copper are formed using a chemical etching process, and the insulating polyimide material beneath the holes is removed by plasma etching. PCBs manufactured in this manner are known as DYCOstrate.
In other similar technologies, various dielectric materials are utilized, which are removed using alkaline solutions. The remainder of the process parallels that of SLC; specifically, holes are metallized via thick copper deposition using either electroless or galvanic plating, and the circuit pattern is established through a tent-and-etch process.
In both SLC and DYCOstrate approaches, through-holes can also be created using conventional drilling and plating processes, alongside surface blind via holes. Cost Impact: The manufacturing cost associated with these sequential technologies may not necessarily be lower than that of conventional MLB technology, primarily due to the laminating press operation. However, considering that the cost of creating standard holes in a board can constitute up to 30 percent of the total manufacturing cost, and the creation of holes in these processes is comparatively economical, the overall cost for achieving equivalent functionality can be reduced.
Image 3: Microvia Aspect Ratio
Additionally, the fine pattern capability of this process is excellent. For instance, an eight-layer conventional structure can frequently be condensed into a four-layer configuration, thereby reducing the overall cost while maintaining the same packaging density.
