a. Nickel: The nickel plating used for printed circuit boards is categorized into semi-bright nickel (also known as low-stress nickel or dumb nickel) and bright nickel. It primarily serves as the base layer for gold-plated or plug-gold-plated boards, but can also function as a surface layer if required. The thickness of the nickel plating must be at least 2 to 2.5 μm, in accordance with the IPC-6012 (1996) standard. The nickel plating layer should be characterized by uniformity and smoothness, low porosity, and good ductility. Additionally, low-stress nickel should be suitable for brazing or pressure welding.
b. Gold: The gold plating used in printed circuit board production is divided into two types: board surface gold plating and plug gold plating.
1) Board surface gold plating: The gold plating on the board surface consists of 24K pure gold with a columnar structure, offering excellent conductivity and solderability. The thickness of this coating ranges from 0.01 to 0.05 μm.
1. The gold-plated layer on the board is deposited on a base of low-stress nickel or bright nickel. The thickness of the nickel-plated layer ranges from 3 to 51 μm. This nickel layer acts as a barrier between the gold and copper, preventing mutual diffusion and stopping copper from penetrating the gold surface. The presence of the nickel layer also increases the hardness of the gold plating.
2. The gold plating layer on the board surface serves not only as a protective layer against alkaline etching but also as the final surface plating for IC aluminum wire bonding and button-type printed circuit boards.
3. Gold-plated plugs, also known as hard gold or “golden fingers,” are coated with an alloy that contains elements such as Co, Ni, Fe, and Sb. This alloy has higher hardness and wear resistance compared to pure gold coatings. The hard gold plating layer typically has a thickness ranging from 0.5 to 1.5 μm or more, with alloying elements comprising less than or equal to 0.2%. Gold-plated plugs are used for high-stability, high-reliability electrical contact connections, requiring specific plating thickness, wear resistance, and low porosity.
4. The hard gold plating layer utilizes low-stress nickel as a barrier to prevent diffusion between gold and copper. To enhance the bonding strength of the hard gold coating, reduce porosity, and protect the plating solution from contamination, a thin layer of pure gold (0.02 to 0.05 μm) should be deposited between the nickel and hard gold layers.
5. Tin: Electroless tinning on bare copper PCBs is a widely recognized solderable coating. This process involves a chemical immersion tinning method, where a substitution reaction occurs between copper and complex tin ions in the plating solution to form a tin layer. The reaction ceases once the copper surface is fully covered by tin.
6. Silver: Electroless silver plating is notable for both soldering and bonding applications. The process is similar to immersion silver plating. Given that the standard electrode potential of copper (0.51 V) is lower than that of silver (0.799 V), copper can displace silver ions in the solution. The deposited silver layer forms on the surface through the reaction: Ag^+ + Cu → Cu^+ + Ag. The reaction stops when the copper surface is fully covered or when the concentration of Cu in the solution reaches a certain level.
7. Palladium: Electroless palladium (Pd) serves as an excellent protective layer for copper and nickel on PCB circuit boards. It can be soldered and bonded directly on copper, and due to its autocatalytic properties, the plating layer can be relatively thick, ranging from 0.08 to 0.2 μm. Palladium can also be plated on an electroless nickel coating. Pd offers high heat resistance and stability, enduring multiple thermal shocks.
8. During assembly and soldering, in Ni/Au plating, when the gold-plated layer comes into contact with molten solder, the gold melts to form AuSn4 in the solder. If the solder weight ratio reaches 3%, it becomes brittle, compromising solder joint reliability. Unlike gold, palladium does not form compounds with molten solder and remains stable on the solder’s surface.
9. Given the higher cost of palladium compared to gold, its use is somewhat limited. However, as IC integration and assembly technology advance, electroless palladium plating is expected to play a more significant role in chip-scale package (CSP) assembly.
b. Gold: The gold plating used in printed circuit board production is divided into two types: board surface gold plating and plug gold plating.
1) Board surface gold plating: The gold plating on the board surface consists of 24K pure gold with a columnar structure, offering excellent conductivity and solderability. The thickness of this coating ranges from 0.01 to 0.05 μm.
1. The gold-plated layer on the board is deposited on a base of low-stress nickel or bright nickel. The thickness of the nickel-plated layer ranges from 3 to 51 μm. This nickel layer acts as a barrier between the gold and copper, preventing mutual diffusion and stopping copper from penetrating the gold surface. The presence of the nickel layer also increases the hardness of the gold plating.
2. The gold plating layer on the board surface serves not only as a protective layer against alkaline etching but also as the final surface plating for IC aluminum wire bonding and button-type printed circuit boards.
3. Gold-plated plugs, also known as hard gold or “golden fingers,” are coated with an alloy that contains elements such as Co, Ni, Fe, and Sb. This alloy has higher hardness and wear resistance compared to pure gold coatings. The hard gold plating layer typically has a thickness ranging from 0.5 to 1.5 μm or more, with alloying elements comprising less than or equal to 0.2%. Gold-plated plugs are used for high-stability, high-reliability electrical contact connections, requiring specific plating thickness, wear resistance, and low porosity.
4. The hard gold plating layer utilizes low-stress nickel as a barrier to prevent diffusion between gold and copper. To enhance the bonding strength of the hard gold coating, reduce porosity, and protect the plating solution from contamination, a thin layer of pure gold (0.02 to 0.05 μm) should be deposited between the nickel and hard gold layers.
5. Tin: Electroless tinning on bare copper PCBs is a widely recognized solderable coating. This process involves a chemical immersion tinning method, where a substitution reaction occurs between copper and complex tin ions in the plating solution to form a tin layer. The reaction ceases once the copper surface is fully covered by tin.
6. Silver: Electroless silver plating is notable for both soldering and bonding applications. The process is similar to immersion silver plating. Given that the standard electrode potential of copper (0.51 V) is lower than that of silver (0.799 V), copper can displace silver ions in the solution. The deposited silver layer forms on the surface through the reaction: Ag^+ + Cu → Cu^+ + Ag. The reaction stops when the copper surface is fully covered or when the concentration of Cu in the solution reaches a certain level.
7. Palladium: Electroless palladium (Pd) serves as an excellent protective layer for copper and nickel on PCB circuit boards. It can be soldered and bonded directly on copper, and due to its autocatalytic properties, the plating layer can be relatively thick, ranging from 0.08 to 0.2 μm. Palladium can also be plated on an electroless nickel coating. Pd offers high heat resistance and stability, enduring multiple thermal shocks.
8. During assembly and soldering, in Ni/Au plating, when the gold-plated layer comes into contact with molten solder, the gold melts to form AuSn4 in the solder. If the solder weight ratio reaches 3%, it becomes brittle, compromising solder joint reliability. Unlike gold, palladium does not form compounds with molten solder and remains stable on the solder’s surface.
9. Given the higher cost of palladium compared to gold, its use is somewhat limited. However, as IC integration and assembly technology advance, electroless palladium plating is expected to play a more significant role in chip-scale package (CSP) assembly.