1. The via itself has a parasitic capacitance to the ground.

2. If it is known that the diameter of the isolation hole on the ground layer of the via is D2, the diameter of the via pad is D1, the thickness of the PCB circuit board is T, and the substrate dielectric is ε, then the parasitic capacitance of the via can be approximated as follows:

3. C = 1.41εTD1/(D2 – D1)

4. The primary effect of the parasitic capacitance of the via hole on the circuit is to extend the rise time of the signal and reduce the overall speed of the circuit.

5. For example, for a PCB with a thickness of 50 mils, if the inner diameter is 10 mils and the pad diameter is 20 mils for the via, with the distance between the pad and the ground copper area being 30 mils, we can use the approximate value from the above formula to calculate the parasitic capacitance of the via: