1. General principles of layer arrangement:
1.1 There are numerous factors to consider when determining the laminated structure of a multilayer PCB. Increasing the number of layers benefits wiring but also raises manufacturing costs and complexity. Manufacturers focus on achieving a balanced laminate structure, considering aspects such as symmetry. Experienced designers, after component pre-layout, analyze PCB routing bottlenecks using EDA tools. They evaluate wiring density and types of signal lines (like differential and sensitive signals) to decide on signal layer count. They also consider power type, isolation, and anti-interference needs for inner electrical layers, thus determining the entire board’s layer count.
1.2 The ground plane beneath the component surface (the second layer) acts as a shielding layer and top wiring reference. Sensitive signal layers should adjoin an internal electrical layer (internal power/ground) for shielding, utilizing the internal electrical layer’s large copper film. High-speed signal layers should be placed between two inner electrical layers to leverage their copper films for electromagnetic shielding and to confine signal radiation, preventing external interference.
1.3 All signal layers should ideally be adjacent to a ground plane.
1.4 Directly adjacent signal layers should be avoided to prevent crosstalk, a common cause of circuit failure. Introducing a ground plane between adjacent signal layers effectively mitigates crosstalk.
1.5 The main power supply should be positioned adjacent wherever possible.
1.6 Consider the symmetry of the laminated structure.
1.7 For motherboard layering, controlling parallel long-distance wiring is challenging. For operating frequencies above 50MHz, recommended principles include complete ground planes on both component and soldering surfaces for shielding, absence of adjacent parallel wiring layers, proximity of all signal layers to ground planes, and key signals avoiding crossing partition areas. Note: Flexibly apply these principles based on specific PCB needs.
1.8 Multiple grounded inner electrical layers can notably reduce ground impedance. For instance, separating ground planes for A and B signal layers effectively minimizes common-mode interference.
2. Commonly used stacked structures:
2.1 4-layer board
The following example illustrates the optimization of various stacked structures for a 4-layer board. For typical 4-layer boards, there are several stacking methods (listed top to bottom):
(1) Signal_1 (Top), GND (Inner_1), POWER (Inner_2), Signal_2 (Bottom).
(2) Signal_1 (Top), POWER (Inner_1), GND (Inner_2), Signal_2 (Bottom).
(3) POWER (Top), Signal_1 (Inner_1), GND (Inner_2), Signal_2 (Bottom).
Clearly, option 3 lacks effective coupling between the power plane and ground plane and should be avoided. So, how should options 1 and 2 be chosen? Typically, designers prefer option 1 for 4-layer board structures. The rationale isn’t that option 2 cannot be used, but rather that standard PCBs often place components only on the top layer, making option 1 more suitable. However, if components need placement on both top and bottom layers, and there’s a significant dielectric thickness between the internal power and ground layers leading to poor coupling, then consideration should be given to the layer with fewer signal lines. Option 1 has fewer signal lines on the bottom layer, allowing for a large-area copper film to couple with the POWER layer. Conversely, if components are mainly on the bottom layer, option 2 should be chosen.
2.2 6-layer board
Following the analysis of 4-layer board laminated structures, here’s an example of a 6-layer board combination method to illustrate the arrangement and preferred combination:
(1) Signal_1 (Top), GND (Inner_1), Signal_2 (Inner_2), Signal_3 (Inner_3), POWER (Inner_4), Signal_4 (Bottom).
Scheme 1 utilizes 4 signal layers and 2 internal power/ground layers, which aids in component wiring but has notable drawbacks: 1. Power and ground layers are distantly coupled. 2. Signal layers like Signal_2 (Inner_2) and Signal_3 (Inner_3) are adjacent, leading to poor signal isolation and potential crosstalk.
(2) Signal_1 (Top), Signal_2 (Inner_1), POWER (Inner_2), GND (Inner_3), Signal_3 (Inner_4), Signal_4 (Bottom).
Compared to Scheme 1, Scheme 2 improves coupling between the power and ground layers, but Signal_1 (Top) and Signal_2 (Inner_1), as well as Signal_3 (Inner_4) and Signal_4 (Bottom), are adjacent, maintaining poor signal isolation and potential crosstalk issues.
(3) Signal_1 (Top), GND (Inner_1), Signal_2 (Inner_2), POWER (Inner_3), GND (Inner_4), Signal_3 (Bottom).
Scheme 3 reduces one signal layer compared to Schemes 1 and 2 and introduces an additional internal power/ground layer. Although the available layers for wiring are fewer, this scheme addresses the common issues found in Schemes 1 and 2: 1. Tight coupling between power and ground layers. 2. Effective isolation between each signal layer and adjacent layers, reducing crosstalk. 3. Signal_2 (Inner_2) benefits from being adjacent to both internal electrical layers (GND (Inner_1) and POWER (Inner_3)), facilitating high-speed signal transmission with effective shielding.
Considering all aspects, Scheme 3 stands out as a balanced option and is commonly used in 6-layer board designs. Through these examples, readers gain insights into stacked structures. However, specific circuit characteristics may necessitate deviation from these guidelines, prioritizing various design principles accordingly.
Unfortunately, circuit board layer design closely hinges on actual circuit characteristics, with different circuits requiring distinct anti-interference performance and design focus. Therefore, these principles lack definitive prioritization guidelines. Nevertheless, design principle 2 (tight coupling between internal power and ground layers) should typically be prioritized, while design principle 3 (using an appropriate layer for high-speed signal transmission) is crucial when transmitting high-speed signals within the circuit.
1.1 There are numerous factors to consider when determining the laminated structure of a multilayer PCB. Increasing the number of layers benefits wiring but also raises manufacturing costs and complexity. Manufacturers focus on achieving a balanced laminate structure, considering aspects such as symmetry. Experienced designers, after component pre-layout, analyze PCB routing bottlenecks using EDA tools. They evaluate wiring density and types of signal lines (like differential and sensitive signals) to decide on signal layer count. They also consider power type, isolation, and anti-interference needs for inner electrical layers, thus determining the entire board’s layer count.
1.2 The ground plane beneath the component surface (the second layer) acts as a shielding layer and top wiring reference. Sensitive signal layers should adjoin an internal electrical layer (internal power/ground) for shielding, utilizing the internal electrical layer’s large copper film. High-speed signal layers should be placed between two inner electrical layers to leverage their copper films for electromagnetic shielding and to confine signal radiation, preventing external interference.
1.3 All signal layers should ideally be adjacent to a ground plane.
1.4 Directly adjacent signal layers should be avoided to prevent crosstalk, a common cause of circuit failure. Introducing a ground plane between adjacent signal layers effectively mitigates crosstalk.
1.5 The main power supply should be positioned adjacent wherever possible.
1.6 Consider the symmetry of the laminated structure.
1.7 For motherboard layering, controlling parallel long-distance wiring is challenging. For operating frequencies above 50MHz, recommended principles include complete ground planes on both component and soldering surfaces for shielding, absence of adjacent parallel wiring layers, proximity of all signal layers to ground planes, and key signals avoiding crossing partition areas. Note: Flexibly apply these principles based on specific PCB needs.
1.8 Multiple grounded inner electrical layers can notably reduce ground impedance. For instance, separating ground planes for A and B signal layers effectively minimizes common-mode interference.
2. Commonly used stacked structures:
2.1 4-layer board
The following example illustrates the optimization of various stacked structures for a 4-layer board. For typical 4-layer boards, there are several stacking methods (listed top to bottom):
(1) Signal_1 (Top), GND (Inner_1), POWER (Inner_2), Signal_2 (Bottom).
(2) Signal_1 (Top), POWER (Inner_1), GND (Inner_2), Signal_2 (Bottom).
(3) POWER (Top), Signal_1 (Inner_1), GND (Inner_2), Signal_2 (Bottom).
Clearly, option 3 lacks effective coupling between the power plane and ground plane and should be avoided. So, how should options 1 and 2 be chosen? Typically, designers prefer option 1 for 4-layer board structures. The rationale isn’t that option 2 cannot be used, but rather that standard PCBs often place components only on the top layer, making option 1 more suitable. However, if components need placement on both top and bottom layers, and there’s a significant dielectric thickness between the internal power and ground layers leading to poor coupling, then consideration should be given to the layer with fewer signal lines. Option 1 has fewer signal lines on the bottom layer, allowing for a large-area copper film to couple with the POWER layer. Conversely, if components are mainly on the bottom layer, option 2 should be chosen.
2.2 6-layer board
Following the analysis of 4-layer board laminated structures, here’s an example of a 6-layer board combination method to illustrate the arrangement and preferred combination:
(1) Signal_1 (Top), GND (Inner_1), Signal_2 (Inner_2), Signal_3 (Inner_3), POWER (Inner_4), Signal_4 (Bottom).
Scheme 1 utilizes 4 signal layers and 2 internal power/ground layers, which aids in component wiring but has notable drawbacks: 1. Power and ground layers are distantly coupled. 2. Signal layers like Signal_2 (Inner_2) and Signal_3 (Inner_3) are adjacent, leading to poor signal isolation and potential crosstalk.
(2) Signal_1 (Top), Signal_2 (Inner_1), POWER (Inner_2), GND (Inner_3), Signal_3 (Inner_4), Signal_4 (Bottom).
Compared to Scheme 1, Scheme 2 improves coupling between the power and ground layers, but Signal_1 (Top) and Signal_2 (Inner_1), as well as Signal_3 (Inner_4) and Signal_4 (Bottom), are adjacent, maintaining poor signal isolation and potential crosstalk issues.
(3) Signal_1 (Top), GND (Inner_1), Signal_2 (Inner_2), POWER (Inner_3), GND (Inner_4), Signal_3 (Bottom).
Scheme 3 reduces one signal layer compared to Schemes 1 and 2 and introduces an additional internal power/ground layer. Although the available layers for wiring are fewer, this scheme addresses the common issues found in Schemes 1 and 2: 1. Tight coupling between power and ground layers. 2. Effective isolation between each signal layer and adjacent layers, reducing crosstalk. 3. Signal_2 (Inner_2) benefits from being adjacent to both internal electrical layers (GND (Inner_1) and POWER (Inner_3)), facilitating high-speed signal transmission with effective shielding.
Considering all aspects, Scheme 3 stands out as a balanced option and is commonly used in 6-layer board designs. Through these examples, readers gain insights into stacked structures. However, specific circuit characteristics may necessitate deviation from these guidelines, prioritizing various design principles accordingly.
Unfortunately, circuit board layer design closely hinges on actual circuit characteristics, with different circuits requiring distinct anti-interference performance and design focus. Therefore, these principles lack definitive prioritization guidelines. Nevertheless, design principle 2 (tight coupling between internal power and ground layers) should typically be prioritized, while design principle 3 (using an appropriate layer for high-speed signal transmission) is crucial when transmitting high-speed signals within the circuit.