Controlling Multiple SPI Devices on a PCB Using Zynq-7020

I am facing a challenge with controlling four SPI-controlled chips on my PCB via an FMC LPC connector using a Zynq-7020. Each chip requires SCLK, MISO, MOSI, and CS lines. However, I lack sufficient clock capable (CC) pins on the FMC LPC connector to assign a separate SPI SCLK to each device.

Here are the options I am considering:

• Option 1: All devices share a single SPI bus (Separate CS lines, but shared SCLK, MISO, MOSI).
• Option 2: Shared SCLK, but separate MISO, MOSI, and CS lines for each device.
• Option 3: Separate SPI buses, with SCLKs driven through LA pins instead of CC pins on the FMC LPC interface (unsure if FPGA will support this).

Considering that my target device is a PCB, I am evaluating the implications of each option on my design. I am seeking the best approach to address this challenge efficiently.