With the increasing output switching speeds of integrated circuits and the growing density of PCBs, signal integrity has become a critical consideration in the design of high-speed digital PCBs. Various factors, including component parameters, PCB characteristics, component placement on the board, and the routing of high-speed signal traces, can lead to signal integrity issues.

In PCB layout, signal integrity requires designing the circuit board in a way that ensures signal timing and voltage levels are not adversely affected. In circuit layout, maintaining signal integrity demands the proper use of termination components, effective layout strategies, and accurate routing techniques.

High signal speeds on the PCB, improper placement of termination components, or incorrect routing of high-speed signal traces can result in signal integrity problems. These issues may lead to incorrect data output, malfunctioning circuits, or even complete system failure. Thus, designing a PCB with full consideration of signal integrity factors and implementing effective control measures has become a key focus in the PCB design industry today.

1. Signal Integrity Issues

Good signal integrity means that a signal can respond with the correct timing and voltage levels when required. On the other hand, signal integrity problems occur when the signal fails to respond as expected.


Signal integrity issues can lead to signal distortion, timing errors, incorrect data, problems with address and control lines, system malfunctions, and even complete system failures. These problems are not caused by a single factor but arise from a variety of issues in the board-level design. Factors such as IC switching speed, improper layout of termination components, or incorrect routing of high-speed signals can all contribute to signal integrity problems. The primary signal integrity issues include: delay, reflection, synchronous switching noise, oscillation, ground bounce, crosstalk, and more.

### 2. Definition of Signal Integrity

Signal integrity refers to a signal’s ability to maintain correct timing and voltage as it propagates through a circuit. It represents the condition in which the signal remains undistorted, indicating the quality of the signal along the signal path.

#### 2.1 Delay

Delay refers to the time it takes for a signal to travel along the PCB traces, from the transmitting end to the receiving end. This transmission delay depends on the length of the trace and the dielectric constant of the material surrounding the trace. In high-speed digital systems, the length of the transmission line is the most direct factor affecting the phase difference of clock pulses. This phase difference occurs when two clock signals, generated simultaneously, arrive at the receiver at different times.

The clock pulse phase difference reduces the predictability of signal edge arrival times. If the phase difference is too large, errors can occur at the receiver. As shown in Figure 1, transmission line delay can significantly impact the clock pulse cycle.

#### 2.2 Reflection

Reflection is the phenomenon of signal echoes on the transmission line. When the signal’s delay time (Delay) is much longer than its transition time (Transition Time), the signal path must behave as a transmission line. If the characteristic impedance of the transmission line does not match the load impedance, part of the signal is transmitted to the load, while the rest is reflected back.

The direction of reflection depends on the impedance mismatch. If the load impedance is lower than the transmission line impedance, the reflection is negative; otherwise, it is positive. Factors such as variations in trace geometry, improper termination, signal transmission through connectors, and discontinuities in the power plane can all cause these reflections.

#### 2.3 Synchronous Switching Noise (SSN)

When multiple digital signals on the PCB switch simultaneously (e.g., CPU data bus, address bus), synchronous switching noise can occur due to the impedance of the power and ground planes. This phenomenon, known as ground bounce noise, can also affect the ground line (referred to as “ground bomb”).

The magnitude of SSN and ground bounce depends on the I/O characteristics of the integrated circuits, the impedance of the PCB’s power and ground planes, as well as the layout and routing of high-speed components.

#### 2.4 Crosstalk

Crosstalk refers to unwanted coupling between two signal lines. The mutual inductance and capacitance between these lines can induce noise. Capacitive coupling causes coupling current, while inductive coupling leads to coupling voltage. Crosstalk noise can originate from electromagnetic coupling between signal traces, signal and power distribution systems, or vias.

Crosstalk can cause issues such as false clocks and intermittent data errors, ultimately degrading the transmission quality of adjacent signals. While it is impossible to completely eliminate crosstalk, it can be controlled within acceptable limits to ensure system performance. Factors such as PCB layer parameters, trace spacing, the electrical characteristics of the driver and receiver, and the termination method all influence the level of crosstalk.

#### 2.5 Overshoot and Undershoot

Overshoot occurs when the voltage exceeds the target value, either on the rising edge (maximum voltage) or the falling edge (minimum voltage). Undershoot is the opposite, where the voltage dips below the set value. Excessive overshoot can trigger the protection diodes, potentially leading to their premature failure. Excessive undershoot can result in clock errors or data misoperation.

#### 2.6 Ringing and Rounding

Ringing is a repeated overshoot and undershoot phenomenon. It occurs when inductance and capacitance in the transmission line cause the signal to oscillate in an underdamped state, whereas rounding refers to an over-damped response. Both ringing and rounding are caused by factors like reflections. While proper termination can reduce oscillations, completely eliminating them is not possible.

#### 2.7 Ground Bounce Noise and Return Noise

Ground bounce noise occurs when large transient currents cause voltage fluctuations in the ground plane. For example, when multiple chip outputs switch simultaneously, a large current surge flows through the power plane and traces. The inductance and resistance of the chip package and power plane create power noise, which results in voltage changes on the true ground plane (OV). This noise can interfere with the operation of other components.

Ground bounce increases with factors such as larger load capacitance, reduced load resistance, higher ground inductance, and more simultaneous switching devices. Additionally, the division of the ground plane (e.g., digital ground, analog ground, shielding ground) can lead to return noise when digital signals traverse into the analog ground region. Similarly, power planes may be segmented into different voltage rails (e.g., 2.5V, 3.3V, 5V), so special attention must be given to ground and return noise in multi-voltage PCB designs.