The Challenge of PCB Online Functional Test Systems

The primary limitation of PCB online functional test systems lies in the reverse driver’s ability to absorb or discharge current, which can mask failures in the input pins of the tested chips. Most chips have high input pin impedance, but if this impedance drops due to internal issues, it can lead to fan-out problems and circuit failures. Standard reverse drive test instruments can handle some of these challenges, but the QT200 faces difficulties with nodes above 8 ohms.

Steps for PCB Online Maintenance

• Gate circuits/combination logic devices
  • Examples: 7400, 7408
  • Testing methods: ICFT, QSM/VI
• Sequential devices/flip-flops, counters
  • Examples: 7474, 7492
  • Testing methods: ICFT, QSM/VI
• Bus devices (three-state output)
  • Examples: 74245, 74244, 74374
  • Testing methods: ICFT, QSM/VI
• PAL, ROM, RAM
  • Examples: 2764, 14464
  • Testing method: ICFT
• LSI devices
  • Examples: 8255, 8088, Z80
  • Testing methods: ICFT, QSM/VI
• User-specific chips
  • Testing method: QSM/VI

Reasons for PCB Test Failure

• Chip function compromise
• Speed/timing discrepancies
• Chip pin status issues (floating, high impedance, illegal connections)
• OC door line or status problems
• Fan-out complications

Classification of ICFT Test Results

• Pass
• Fail
• Device not fully tested
• Devices are identical
• Devices differ

Addressing Different Test Results in PCB Online Functional Tests

If a test fails, steps to troubleshoot include verifying connections, checking pin impedance, adjusting test thresholds, and analyzing output pin behavior. These steps help identify timing issues, load problems, and potential chip damage, guiding the next course of action.

Common Issues in PCB Testing and Troubleshooting

• If a tested chip’s output pin remains fixed during testing, the system may display “The device is not fully tested,” indicating a potential issue.

  For example, a shorted input pin on a NAND gate can cause the output to stay high.

• Having the circuit schematic for the board simplifies determining chip pin connection status.

• Learning the normal connection status of a chip on a good board helps in identifying discrepancies when testing a faulty board.

  Comparing results to those of a known good board can reveal illegal connections.

• For OC devices designed in a “wire-OR” state, outputs may be affected by other connected chips or the PCB.

  Utilizing the QSM/VI method to compare VI curves across similar function pins can help identify faults in such devices.