PCB design is pivotal in electronic product development, requiring engineers to consider factors like optimal electrical performance, software proficiency (with CADENCE ALLEGRO leading the market), material selection, signal integrity, power supply integrity, and electromagnetic interference, all to ensure reliable, high-performance electronic systems.
1. Design for Manufacturing (DFM) Layout Requirements 1.1. Determine the preferred process route and place all components on the PCB. 1.2. The origin point is the intersection of the left bottom extension line of the frame and the bottom extension line or the lower left solder pad of the socket. 1.3. Maintain spacing between components to avoid short circuits or overheating. 1.4. Choose appropriate routing directions, favoring straight paths and minimizing tight bends. 1.5. Ensure sufficient trace width to meet current and impedance requirements, with some margin. 1.6. Arrange power and ground traces appropriately to reduce noise interference. 1.7. For multi-layer boards, allocate signal, power, and ground layers reasonably. 1.8. Reserve adequate board and hole spacing to meet manufacturing and assembly needs. 1.9. Properly place holes to avoid overlap with traces or other components. 1.10. Pay attention to the layout of thermal sensitive components, keeping them away from heat sources with good heat dissipation pathways. 2. The actual size of the PCB, device positioning, etc., must align with the process structure diagram. Device layout in areas with limited height should adhere to the structure diagram’s specifications. 3. Considerations for Switches, Indicators, etc. 3.1. Placement of dial switches, reset devices, indicator lights, etc., should not interfere with surrounding devices. 3.2. The outer frame of the board should have a smooth radius of 197 mils, or follow the structural dimension drawing. 4. General Layout Guidelines 4.1. Maintain a 200 mil process edge for ordinary boards. 4.2. Add necessary holes (e.g., ICT positioning hole, handle strip hole) correctly. 4.3. Consider wave soldering requirements for device pin spacing, orientation, spacing, and library selection. 4.4. Ensure proper spacing between devices for assembly requirements. 5. Specific Component Placement Guidelines 5.1. Mark polarity devices clearly. 5.2. Ensure all devices are clearly marked. 5.3. Include 3 positioning cursors in an “L” shape on surfaces containing SMD devices. 6. Cooling and Heat Dissipation 6.1. Ensure proper separation between electrolytic capacitors and high-heat devices. 6.2. Consider heat dissipation for high-power devices and devices under the gusset. 7. Signal Integrity Considerations 7.1. Match origin and termination closely to transmitting and receiving devices. 7.2. Place decoupling capacitors near related devices. 7.3. Segment high-speed and low-speed, digital and analog signals into modules. 8. Electromagnetic Compatibility (EMC) Requirements 8.1. Avoid placing inductive devices prone to magnetic field coupling near each other. 8.2. Shield sensitive devices from devices with strong radiation. 8.3. Place interface devices near the board’s edge and implement appropriate EMC protection measures. 9. Layer Setup and Power Ground Splitting 9.1. Define clear rules for vertical routing between adjacent signal layers. 9.2. Ensure each routing layer has a complete reference plane. 9.3. Use symmetrical core material in stacked multi-layer boards to prevent warping. 10. Power Module Layout 10.1. Ensure smooth and non-crossing input and output lines in the power supply part layout. 10.2. Place filter circuits near the power outlet and inlet of the boards for power supply. 11. Miscellaneous Requirements 11.1. Consider overall wiring smoothness and reasonable data flow. 11.2. Adjust device pin assignments to facilitate wiring. 11.3. Allow space for dense traces to avoid routing issues. 11.4. Consider delivery period and machinability for special materials, devices, and processes. 12. Final Steps 12.1. Confirm pin-to-pin correspondence of connectors. 12.2. Consider ICT test point feasibility during layout. 12.3. Provide a 1:1 assembly drawing for component package verification. 13. Ensure the inner plane is indented at window openings and set appropriate prohibited wiring areas on the PCB.
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