2, two holes overlap in the multilayer board, such as one hole position is the isolation disk, the other hole position is the connection disc (the flower soldering pad), after drawing the negative in this way, it appears as the isolation disk, which causes the scrap.
II. Abuse of graphics.
1, in some graphics layer to do some useless line, was originally a four-layer board but designed more than five layers of lines, so that cause misunderstanding.
2. It is easy to design. Take Protel software as an example, Board layer is used to draw the line of every layer, and Board layer is used to mark the line. In this way, when the light drawing data is carried out, because the Board layer is not selected, the line is missed and the circuit is broken.
Or it may be short-circuited by selecting the marking lines for the Board layer, so the graphic layer is designed to be complete and clear.
3. Disobeying the conventional design, such as component surface design in Bottom layer, welding surface design in Top, cause inconvenience.
III. Misplacing of characters.
1. The character cap pad SMD solder piece brings inconvenience to the on-off test of PCB and the welding of components.
2, the character design is too small, resulting in the difficulties of screen printing, too large overlapping characters, it is difficult to distinguish.
Setting of single side Pad Aperture.
1. One-sided pads are usually not drilled. If the holes need to be marked, their aperture should be designed to be zero.
If a number is designed, then the coordinates of the hole appear at this location when the borehole data is generated, and there is a problem.
2. Single-sided pads should be marked with special marks if the holes are drilled.
V. draw pads with padding blocks.
The pads drawn with pads can pass the DRC inspection when the circuit is designed, but can not be used for machining, because such pads can not directly generate the solder resistance data, and when the flux is applied, the filler area will be covered by the flux.
It is difficult to weld and assemble the device.
6. The electric strata are both flowered pads and wired lines.
Because the power source is designed in the form of solder pads, the layer is the opposite of the actual image on the printed board, and all connections are isolating lines, which the designer should be well aware of.
By the way, care should be taken when drawing several sets of power sources or isolation lines for several types of ground, not to leave a gap, short circuit two sets of power sources, or block the area of the connection (so that one set of power sources is separated).
7. The definition of processing level is not clear.
1. The single side board design is in the TOP layer, if does not add the explanation positive and negative to do, perhaps makes the board to install the device but not to be able to weld.
2, for example, a four-layer board design using TOPmid1, mid2 bottom four-layer, but processing is not placed in this order, which requires explanation.
There are too many padding blocks in the design or the padding blocks are filled with very thin lines.
1. The light painting data is lost, and the light painting data is not complete.
2. Because the fill block is drawn by a line in the light painting data processing, so the amount of light painting data is quite large, which increases the difficulty of data processing.
The pad of the surface mount device is too short.
This is for on-off testing. For too dense a surface mount device, the spacing between the two pins is fairly small and the pads are very thin. The pin must be installed in a staggered position (left and right), such as the pad design is too short.
Although does not affect the device installment, but can cause the test needle not to open incorrectly.
X. the spacing of large area grids is too small.
The edge of the grid line is too small (less than 0.3mm). In the process of PCB manufacturing, there are many broken film attached to the board after the image is displayed, which leads to the broken line in the PCB manufacturing process. The result of the paper is as follows: (1) the edge of the grid line is too small (less than the edge of the line).
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