VXSDR-20: The Ultimate Microwave Software-Defined Radio
The VXSDR-20 is a cutting-edge microwave software-defined radio (SDR) that offers unparalleled performance across a frequency range of 5 to 20 GHz, with a sampling rate of 160 million samples per second. It boasts features comparable to advanced SDRs, such as 10-gigabit Ethernet connectivity, support for C and C++ programming, and seamless integration with Python and GnuRadio. This SDR also enables synchronization across multiple radios, among other impressive capabilities.
One of the key advantages of the VXSDR-20 is its ease of application porting, with both its software and firmware being open-source. Its modular design allows for various configurations, including multiple channels, extended or reduced frequency ranges, and adjustable sample rates. Additionally, the system supports simultaneous full-rate transmit and receive via 10 Gb Ethernet by default, accepting 10 MHz and 1 PPS frequency and time references for synchronization.
Enhancing Frequency Range for Diverse Applications
While software-defined radios are widely used across various fields, commercially available SDRs typically operate below 6 GHz. To address the demand for a broader frequency range, the creators of the VXSDR-20 developed a system that operates between 5 and 20 GHz, catering to applications requiring functionality at higher frequencies.
Designed to function like a high-end SDR but with extended frequency coverage, the VXSDR-20 is perfect for laboratory research in communication systems and sensing applications. It supports both transmission and reception, with a user-friendly host API that ensures seamless porting from the widely adopted Ettus UHD API.
Key Features & Specifications
Analog RF and IF
- 5.0 – 20.0 GHz transmit and receive (usable up to 22 GHz)
- 5 – 9 dB receive noise figure
- 10 – 15 dBm output power
- Low-IF design (160 MHz IF)
- TX output and TX/RX input/output (field-replaceable SMA connectors)
Digital
- 14-bit, 160 MSPS A/D converter for reception
- 16-bit, 160 MSPS D/A converter for transmission
- JESD204B interfaces for data transfer
- Intel Cyclone 10 FPGA (85k – 220k logic elements)
Control and Data Transfer
- 10 gigabit Ethernet interface (SFP+)
- Simultaneous full-rate transmit and receive capabilities
- PPS and 10 MHz inputs for synchronization
Software
- Developed in C++ using boost::asio and boost::lockfree::spsc_queue for data handling
- API design similar to UHD for easy integration with existing code
- Linux support currently available; Windows and Mac support in progress
- Future plans for Python bindings and GPL v3 licensing with code on GitHub
Power
- 12 V DC power input
- 22 W active power consumption, 16 W idle
Physical Dimensions
- 9.4 inches (23.9 cm) long (including connectors)
- 4.1 inches (10.5 cm) wide
- 1.0 inch (2.4 cm) high
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