High-frequency PCBs typically feature high integration and dense wiring. The use of multi-layer boards is not only essential for routing but also serves as an effective method for reducing interference. During the PCB layout phase, selecting the appropriate board size with the correct number of layers allows for efficient use of intermediate layers for shielding, better grounding, and effectively reducing parasitic inductance. This also shortens the signal transmission path, while still maintaining a high degree of integration. All of these measures contribute to the reliability of high-frequency circuits, such as minimizing signal amplitude reduction caused by cross-interference. With the same material, the noise level of a four-layer board is 20 dB lower than that of a two-layer board. However, there is a downside: as the number of PCB layers increases, the manufacturing process becomes more complex, and the cost per unit rises. Therefore, PCB designers must not only choose the appropriate number of layers but also plan the component layout effectively and adhere to correct routing guidelines to ensure a successful design.

1. **The fewer the via layers between the pins of high-frequency circuit devices, the better.**

This principle, “the fewer the inter-layer alternations of the leads, the better,” refers to minimizing the number of vias used in the process of connecting components.

2. **The shorter the lead lengths between the pins of high-frequency circuit devices, the better.**

1. **The radiation intensity of the signal is proportional to the trace length of the signal line.**

The longer the high-frequency signal trace, the greater the likelihood of coupling to nearby components. Therefore, signals such as clock, crystal oscillator, DDR data, LVDS, USB, HDMI, and other high-frequency lines should be kept as short as possible.

3. **The fewer bends in the leads between high-speed electronic device pins, the better.**

High-frequency circuit traces should ideally follow a straight path. If bending is necessary, it should be done using a 45-degree angle or a curved arc. This guideline is intended to improve the mechanical integrity of copper traces in low-frequency circuits, but in high-frequency circuits, it also helps reduce external radiation and mutual coupling of high-frequency signals.

4. **Pay attention to the crosstalk introduced by signal lines running in parallel at close distances.**

High-frequency PCB routing must consider the “crosstalk” introduced when signal lines run parallel and in close proximity. Crosstalk refers to the electromagnetic coupling between signal lines that are not directly connected. High-frequency signals travel as electromagnetic waves along the transmission line, causing the trace to act like an antenna, emitting energy in the form of an electromagnetic field. This coupling can generate unwanted noise due to the interaction of electromagnetic fields, which is known as crosstalk. Factors such as PCB layer parameters, signal line spacing, and the electrical characteristics of both the driving and receiving ends, as well as the signal termination methods, can all influence crosstalk. To minimize crosstalk in high-frequency signals, follow these practices when routing:

(1) When possible, insert a ground trace or ground plane between signal lines with significant crosstalk, as this can help isolate the signals and reduce interference.

(2) If parallel routing cannot be avoided and there is a time-varying electromagnetic field in the surrounding area, place a large ground area opposite the parallel signal traces to help mitigate interference.

(3) When space permits, increase the spacing between adjacent signal traces, reduce the parallel length, and aim to route clock traces perpendicular to other critical signal lines, rather than parallel.

(4) If parallel routing is unavoidable in the same layer, ensure that traces in adjacent layers are routed perpendicularly to each other.

(5) In digital circuits, clock signals are typically fast-changing and prone to generating significant crosstalk. To mitigate this, design the clock traces to be surrounded by ground traces, and use more ground vias to reduce distributed capacitance, which helps lower crosstalk.

(6) For high-frequency clock signals, consider using low-voltage differential signaling (LVDS) and ensure proper ground plane integrity.

(7) Avoid leaving unused input pins floating. Instead, ground them or connect them to the power supply (the power supply should also be grounded in the high-frequency signal loop), as floating traces can act like antennas, potentially transmitting unwanted signals. Grounding can help inhibit this effect, and this method has been shown to effectively reduce crosstalk in many cases.

5. **Isolate the ground of high-frequency digital signals from the analog signal ground.**

When connecting the analog ground and digital ground to a common ground, use high-frequency choke beads or ensure a direct isolation with a suitable single-point connection. The ground potential of high-frequency digital signals can fluctuate, and there may be voltage differences between the two. Furthermore, the digital signal ground often carries significant harmonic components from the high-frequency signals. Directly connecting the digital and analog signal grounds can result in interference, as the harmonics from the digital signal can couple into the analog signals. To prevent this, it is best to isolate the two ground systems, using a single-point interconnection or high-frequency choke beads where necessary.

6. **Add high-frequency decoupling capacitors to the power supply pins of integrated circuits.**

Placing high-frequency decoupling capacitors close to the power supply pins of integrated circuits can significantly reduce the impact of high-frequency harmonics, helping to maintain signal integrity on the power supply rail.

7. **Avoid loops formed by routing.**

High-frequency signal traces should avoid forming loops. If loops are unavoidable, the loop area should be minimized to reduce unwanted noise and signal reflections.

8. **Ensure proper signal impedance matching.**

Impedance mismatch during signal transmission leads to signal reflections, which can cause overshoot and fluctuations near the logic threshold. The key to eliminating reflections is to match the impedance of the signal transmission line with the load impedance. A larger difference between the load impedance and the characteristic impedance of the trace results in stronger reflections. To avoid this, the characteristic impedance of the transmission line should be kept as close as possible to the load impedance. Additionally, ensure that the transmission line on the PCB has no sharp changes or corners, and maintain continuous impedance throughout the trace to avoid reflections along the transmission path.

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