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1. When designing a PCB to connect multiple devices (up to 4 or 5) such as FLASH, SDRAM, and other peripherals using a group of buses (address, data, command), what wiring method should be employed?

The impact of wiring topology on signal integrity primarily manifests as inconsistent signal arrival times at each node, along with reflected signals reaching certain nodes simultaneously, which can degrade signal quality. Generally, a star topology allows for the control of several stubs of equal length, thereby synchronizing signal transmission and reflection delays to enhance signal quality. However, it is essential to consider the specific characteristics of the signal topology, the actual working principles involved, and the complexity of the wiring before implementation. Different buffers can have varying effects on signal reflection; therefore, the star topology may not adequately address the delays in the data address bus connecting to FLASH and SDRAM, potentially compromising signal quality. Furthermore, high-speed signals typically pertain to communication between DSP and SDRAM, while FLASH loading speeds are relatively lower. Consequently, in high-speed simulations, the focus should be on ensuring the waveform integrity at the nodes where high-speed signals are actively functioning, rather than on the waveform at the FLASH. Compared to daisy chain and other topologies, star topology tends to complicate wiring, especially when a large number of data address signals are involved. The attached figure illustrates the simulation waveforms for the DDR-DSP-FLASH topology connection and the DDR-FLASH-DSP connection at 150 MHz. It is evident that in the second case, the signal quality at the DSP is superior, although the waveform at the FLASH is poorer, highlighting that the actual working signal is represented by the waveforms at the DSP and DDR.

2. For PCBs operating at frequencies above 30 MHz, should automatic wiring or manual wiring be utilized? Are the software functions for wiring identical?


1. Whether the high-speed signal relies on the rising edge of the signal rather than the absolute frequency or speed is crucial. The choice between automatic and manual routing hinges on the capabilities of the software’s routing function. While some connections may be more effectively handled manually than automatically, for tasks such as checking distribution lines or bus delay compensation, the performance and efficiency of automatic routing often surpass manual methods. Typically, the substrate of a PCB copy board consists mainly of a resin and glass cloth mixture. Variations in proportions lead to differences in dielectric constant and thickness. Generally, a higher resin content results in a lower dielectric constant and allows for thinner materials. For specific parameters, it is advisable to consult the PCB manufacturer. Additionally, with the introduction of new processes, there are PCB boards made from specialized materials, such as ultra-thick backplanes or low-loss RF boards.

2. In PCB design, the ground connections are usually categorized into protective ground and signal ground, while power ground is divided into digital ground and analog ground. Why is it necessary to separate the ground connections? The primary reason for this division is related to EMC considerations, as there is a concern that noise from the digital components of the power supply and ground could interfere with other signals, especially analog signals, through conduction paths. The separation of signal and protective ground is also influenced by ESD static discharge considerations, akin to the function of lightning rod grounding in everyday life. Ultimately, despite the divisions, there is only one ground; the method of noise emission varies.

3. Is it essential to include ground wire shields on both sides when fabricating the clock? The decision to add a shielded ground wire depends on the crosstalk/EMI conditions present on the board. If not implemented correctly, a shielded ground wire could potentially exacerbate the situation.

4. What measures should be taken when routing clock lines of varying frequencies? For clock line routing, it is advisable to conduct a signal integrity analysis, establish appropriate routing guidelines, and adhere to these guidelines during the routing process.

5. When manually routing a single-layer PCB, should the traces be placed on the top layer or the bottom layer? If the components are positioned on the top layer, the routing should occur on the bottom layer.
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